ATA5760 ATMEL Corporation, ATA5760 Datasheet - Page 28

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ATA5760

Manufacturer Part Number
ATA5760
Description
Ata5760 Uhf Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet

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13. Programming the Configuration Register
Figure 13-1. Timing of the Register Programming
Figure 13-2. Data Interface
28
Serial bi-directional
data line
Out1
(microcontroller)
Data_out (DATA)
IC_ACTIVE
ATA5760/ATA5761
Data_In
Data_out
V
S
= 4.5 V to 5.5 V
0 V/5 V
X
X
Receiving
mode
The configuration registers are programmed serially via the bi-directional data line according to
Figure 13-1
To start programming, the serial data line DATA is pulled to Low for the time period t1 by the
microcontroller. When DATA has been released, the receiver becomes the master device. When
the programming delay period t2 has elapsed, it emits 15 subsequent synchronization pulses
with the pulse length t3. After each of these pulses, a programming window occurs. The delay
until the program window starts is determined by t4, the duration is defined by t5. Within the pro-
gramming window, the individual bits are set. If the microcontroller pulls down pin DATA for the
time period t7 during t5, the according bit is set to ’0’. If no programming pulse t7 is issued, this
bit is set to ’1’. All 15 bits are subsequently programmed this way. The time frame to program a
bit is defined by t6.
t1
Interface
Input -
and
ATA5760/
t2
ATA5761
Figure
0 ... 20 V
t3
(Start bit)
t4
Bit 1
("0")
I
D
13-2.
t5
t7
t6
DATA
Programming frame
(Register-
Bit 2
("1")
select)
Serial bi-directional data line
V
R
C
pup
X
L
= 5 V to 20 V
I/O
(Poll8)
Bit 14
("0")
Microcontroller
(Stop bit)
Bit 15
("0")
Out1 (microcontroller )
t8
t9
Sleep
mode
T
Sleep
Start-up
T
mode
Start-up
4896C–RKE–04/06

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