HT56R66 Holtek Semiconductor Inc., HT56R66 Datasheet - Page 82

• Manufacturer Part Number: HT56R66
• Description: Tinypower Tm A/d Type With Lcd 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

Power Down Mode and Wake-up
Power Down Mode
All of the Holtek microcontrollers have the ability to enter
a Power Down Mode. When the device enters this
mode, the normal operating current, will be reduced to
an extremely low standby current level. This occurs be-
cause when the device enters the Power Down Mode,
the system oscillator is stopped which reduces the
power consumption to extremely low levels, however,
as the device maintains its present internal condition, it
can be woken up at a later stage and continue running,
without requiring a full reset. This feature is extremely
important in application areas where the MCU must
have its power supply constantly maintained to keep the
device in a known condition but where the power supply
capacity is limited such as in battery applications.
Entering the Power Down Mode
There is only one way for the device to enter the Power
Down Mode and that is to execute the HALT instruc-
tion in the application program. When this instruction is
executed, the following will occur:
Standby Current Considerations
As the main reason for entering the Power Down Mode
is to keep the current consumption of the MCU to as low
a value as possible, perhaps only in the order of several
micro-amps, there are other considerations which must
also be taken into account by the circuit designer if the
Rev. 1.10
Slow Mode1
f
on/off depending upon the LCDEN bit, f
pending upon the WDT configuration option and WDT
control register.
Idle Mode
f
f
bit, f
option and WDT control register.
Sleep Mode
f
pending upon the WDT configuration option and WDT
control register.
The system oscillator will stop running and the appli-
cation program will stop at the HALT instruction.
The Data Memory contents and registers will maintain
their present condition.
The WDT will be cleared and resume counting if the
WDT clock source is selected to come from the WDT
oscillator. The WDT will stop if its clock source origi-
nates from the system clock.
The I/O ports will maintain their present condition.
In the status register, the Power Down flag, PDF, will
be set and the Watchdog time-out flag, TO, will be
cleared.
M
M
SUB
M
, f
, f
on, f
SLOW
SLOW
WDT
or f
SLOW
SYS
, f
on/off depending upon the WDT configuration
, f
SYS
SYS
/4, f
=f
, f
M
off, CPU off; f
/2~f
LCD
S
, f
LCD
M
on/off depending upon the LCDEN
/64, f
off, CPU off; f
SYS
SUB
=f
SLOW
on, f
, CPU on, f
S
SUB
on/off by selecting
, f
WDT
WDT
on/off de-
on/off de-
S
on, f
LCD
82
power consumption is to be minimized. Special atten-
tion must be made to the I/O pins on the device. All
high-impedance input pins must be connected to either
a fixed high or low level as any floating input pins could
create internal oscillations and result in increased cur-
rent consumption. This also applies to devices which
have different package types, as there may be
undonbed pins, which must either be setup as outputs
or if setup as inputs must have pull-high resistors con-
nected. Care must also be taken with the loads, which
are connected to I/O pins, which are setup as outputs.
These should be placed in a condition in which minimum
current is drawn or connected only to external circuits
that do not draw current, such as other CMOS inputs.
Also note that additional standby current will also be re-
quired if the configuration options have enabled the
Watchdog Timer internal oscillator.
Wake-up
After the system enters the Power Down Mode, it can be
woken up from one of various sources listed as follows:
If the system is woken up by an external reset, the de-
vice will experience a full system reset, however, if the
device is woken up by a WDT overflow, a Watchdog
Timer reset will be initiated. Although both of these
wake-up methods will initiate a reset operation, the ac-
tual source of the wake-up can be determined by exam-
ining the TO and PDF flags. The PDF flag is cleared by a
system power-up or executing the clear Watchdog
Timer instructions and is set when executing the HALT
instruction. The TO flag is set if a WDT time-out occurs,
and causes a wake-up that only resets the Program
Counter and Stack Pointer, the other flags remain in
their original status.
Each pin on Port A can be setup via an individual config-
uration option to permit a negative transition on the pin
to wake-up the system. When a Port A pin wake-up oc-
curs, the program will resume execution at the instruc-
tion following the HALT instruction.
If the system is woken up by an interrupt, then two possi-
ble situations may occur. The first is where the related
interrupt is disabled or the interrupt is enabled but the
stack is full, in which case the program will resume exe-
cution at the instruction following the HALT instruction.
In this situation, the interrupt which woke-up the device
will not be immediately serviced, but will rather be ser-
viced later when the related interrupt is finally enabled or
when a stack level becomes free. The other situation is
where the related interrupt is enabled and the stack is
not full, in which case the regular interrupt response
takes place. If an interrupt request flag is set to 1 be-
An external reset
An external falling edge on Port A
A system interrupt
A WDT overflow
HT56R66/HT56R666
September 8, 2009