HV9606X Supertex Inc, HV9606X Datasheet - Page 6

• Manufacturer Part Number: HV9606X
• Description: HV9606 Current-Mode PWM Controller with Supervisor
• Manufacturer: Supertex Inc

Functional Description – Continued
Start-Up Regulator
The start-up regulator guarantees a maximum V
current of 6 A at 20V at the V
START/STOP circuit. When the effective input voltage exceeds
the programmed START voltage, the regulator is turned on and
seeks to provide a nominal 2.9V at the V
voltage for all internal circuitry within the HV9606 except the
start/stop circuit. This regulator is capable of input voltages up to
250 Volts, which is the typical maximum arrester voltage limit used
to provide protection on telephone wires. Due to the high voltage
rating of the regulator the HV9606 can be used for applications
operating from rectified AC mains up to 140Vrms. The regulator
can supply a minimum of 5mA, which is sufficient to power the
internal circuitry and provide gate drive power for the external
MOSFET until the bootstrap circuit from the output of the PWM
drives the voltage on the V
point. This forces the regulator to turn off and reduce the input
current at the Vin pin to leakage levels. The V
bypassed with a capacitor of at least 1 F, which provides the peak
currents required by the voltage doubler and in turn the gate driver
for the external MOSFET.
For low power applications the circuit may be operated without
bootstrapping. Care should be taken to assure that the power
dissipation in the regulator does not become excessive, as it might
be if the input voltage is high and the gate drive energy required is
high (operating at high frequency).
Low voltage operation of the HV9606 is also possible by powering
V
Vin, START and STOP pins should be connected to SGND pin.
When powering only via V
available and the startup regulator circuit is not used.
V
To guarantee correct operation, internal circuitry is held reset by an
under voltage lockout (V
is at least 100mV below the startup regulator set point.
guarantee stable starting the V
100mV.
Oscillator
The oscillator circuit operates at twice the PWM output frequency.
The frequency can be programmed in the range of 30kHz to
800kHz by means of a single resistor connected from the RT pin to
SGND. For a given frequency the value of the resistor can be
calculated using the following equation:
R
DD
DD
T
= [(1 / f
from supply voltages of 2.9V to 5.5V. In these applications the
Under Voltage Lockout
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: [phone] FAX: [phone] www.supertex.com
OSC
) –1x10
-7
] / 42.6x10
DD
UVLO) until the regulator output voltage
DD
DD
, the START/STOP control is not
-12
pin higher than the regulator set
IN
DD
pin while it is inhibited by the
UVLO has a hysteresis of
DD
pin, which is the supply
DD
IN
pin is typically
pin leakage
To
6
Synchronization
The SYNC pin is an input/output (I/O) port to a unique fault tolerant
peer-to-peer and/or to master clock synchronization circuit. For
synchronization the SYNC pins of multiple HV9606 based
converters can be connected together and may also be connected
to the open drain/collector output of an external master clock.
When connected in this manner the oscillators will lock to the
device with the highest operating frequency. The LOW duty cycle
of an external master clock should not exceed 50%.
synchronized in this manner, a permanent logic HIGH or LOW
condition on the SYNC pin will result in a loss of synchronization,
but the HV9606 based converters will continue to operate at their
individually set operating frequency. For this reason the SYNC pin
is considered fault tolerant, since loss of synchronization will not
result in total system failure.
Depending on the cumulative parasitic capacitance on the SYNC
pin when connected in the above manner a pull up resistor may be
required from the SYNC pin to the V
DC/DC converter circuit. The value of the resistor will depend on
the cumulative parasitic capacitance and operating frequency.
Voltage Doubler
The HV9606 can operate on internal voltages ranging from 2.9V to
5.5V.
operating with such low gate drive voltages. For this reason the
HV9606 incorporates a voltage doubler circuit that generates a
voltage on the VX2 pin that is approximately two times the V
voltage. This circuit uses capacitive charge transfer methods and
requires the connection of a capacitor (typically 0.01 F) between
the CA and CB pins as well as an energy storage capacitor
(typically 0.1 F) connected from the VX2 pin to PGND pin. The
voltage doubler operates at the PWM output frequency.
The gate driver output on the GATE pin operates from the VX2
voltage, logic level (5Volt) gate power MOSFETs may be used
when V
MOSFETs may be used when V
VX2 Under Voltage Lockout
To guarantee that sufficient gate drive voltage is available, an
under voltage lockout circuit (VX2 UVLO) monitors the VX2
voltage. If the VX2 voltage drops below 4.5V the gate driver output
of the PWM circuit is inhibited to prevent damage to the power
MOSFET. This under voltage lockout has a hysteresis of 400mV
to prevent spurious operation.
Band Gap Reference
The
START/STOP circuit, are based on the 1% tolerance band gap
reference voltage available on the REF pin.
delivering 100 A for use by external circuitry without degrading the
reference.
connected from the REF pin to SGND pin.
operating
It may be difficult to find power MOSFETs capable of
DD
is bootstrapped at 3.3V or standard (10V) gate
A bypass capacitor of at least 0.1 F should be
limits
of
all
DD
is bootstrapped at 5V.
internal
DD
pin on each HV9606 based
circuits,
It is capable of
4/15/2002-R.L2
HV9606
except
When
the
DD