LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 44

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LPC47M172

Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note:
6.4.7
BIT 0 and 1 DATA RATE SELECT
BIT 2 through 4 PRECOMPENSATION SELECT
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
L0-CRF2-Bx = FDC Logical Device, Configuration Register F2, Bit x.
Data Rate Select Register (DSR)
Address 3F4 WRITE ONLY
This register is write only. It is used to program the data rate, amount of write precompensation, power
down status, and software reset. The data rate is programmed using the Configuration Control Register
(CCR) not the DSR, for PC/AT and PS/2 Model 30.
This register is write only. It is used to program the data rate, amount of write precompensation, power
down status, and software reset. The data rate is programmed using the Configuration Control Register
(CCR) not the DSR, for PC/AT and PS/2 Model 30.
Other applications can set the data rate in the DSR. The data rate of the floppy controller is the most
recent write of either the DSR or CCR. The DSR is unaffected by a software reset. A hardware reset will
set the DSR to 02H, which corresponds to the default precompensation setting and 250 Kbps.
These bits control the data rate of the floppy controller. See Table 6.8 for the settings corresponding to the
individual data rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps
after a hardware reset.
These three bits select the value of write precompensation that will be applied to the WDATA output
signal. Table 6.7 shows the precompensation values for the combination of these bits settings. Track 0 is
the default starting track number to start precompensation. This starting track number can be changed by
the configure command.
RESET
COND.
DIGITAL OUTPUT REGISTER
RESET
S/W
Bit 1
7
0
0
0
1
1
POWER
DOWN
6
0
Table 6.6 - Drive Type ID
Bit 0
0
1
0
1
DATASHEET
5
0
0
COMP2
PRE-
Page 44
4
0
L0-CRF2 – B1
L0-CRF2 – B3
L0-CRF2 – B5
L0-CRF2 – B7
REGISTER 3F3 – DRIVE TYPE ID
Bit 5
COMP1
PRE-
3
0
COMP0
PRE-
2
0
L0-CRF2 – B0
L0-CRF2 – B2
L0-CRF2 – B4
L0-CRF2 – B6
DRATE
SEL1
Bit 4
1
1
DRATE
SEL0
0
0
SMSC LPC47M172

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