LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 6

• Manufacturer Part Number: LPC47M172
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
7.25
7.8.1
7.10.1
7.10.2
7.11.1
7.12.1
7.12.2
7.12.3
7.12.4
7.12.5
7.12.6
7.12.7
7.12.8
7.12.9
7.13.1
7.21.1
7.21.2
7.21.3
7.21.4
7.21.5
7.23.1
7.23.2
7.23.3
7.23.4
7.23.5
7.23.6
7.23.7
7.23.8
7.25.1
7.25.2
7.25.3
7.25.4
7.25.5
7.25.6
7.25.7
7.25.8
7.25.9
7.25.10
7.25.11
7.25.12
7.25.13
EPP 1.9 Write.............................................................................................................................................95
EPP 1.9 Read ............................................................................................................................................96
EPP 1.7 Operation .....................................................................................................................................96
EPP 1.7 Write.............................................................................................................................................97
EPP 1.7 Read .........................................................................................................................................97
ECP Implementation Standard ...............................................................................................................99
Register Definitions...............................................................................................................................100
Operation..............................................................................................................................................107
ECP Operation .....................................................................................................................................107
Termination from ECP Mode ................................................................................................................108
Command/Data.....................................................................................................................................108
Data Compression ................................................................................................................................108
Pin Definition ........................................................................................................................................108
LPC Connections..................................................................................................................................109
Interrupts ..............................................................................................................................................109
FIFO Operation.....................................................................................................................................109
Power Management..............................................................................................................................111
Serial IRQ .............................................................................................................................................111
Interrupt Generating Registers .............................................................................................................114
8042 Keyboard Controller Description ..................................................................................................115
Software Constraints...........................................................................................................................96
Extended Capabilities Parallel Port .................................................................................................98
Vocabulary.......................................................................................................................................98
Description.......................................................................................................................................99
Data and ecpAFifo Port .................................................................................................................101
Device Status Register (dsr)..........................................................................................................102
Device Control Register (dcr) ........................................................................................................102
CFIFO (Parallel Port Data FIFO) ...................................................................................................103
ECPDFIFO (ECP Data FIFO) ........................................................................................................103
tFifo (Test FIFO Mode) ..................................................................................................................103
cnfgA (Configuration Register A) ...................................................................................................104
cnfgB (Configuration Register B) ...................................................................................................104
ecr (Extended Control Register) ....................................................................................................104
Mode Switching/Software Control..................................................................................................107
DMA Transfers ..............................................................................................................................110
DMA Mode - Transfers from the FIFO to the Host.........................................................................110
Programmed I/O Mode or Non-DMA Mode ...................................................................................110
Programmed I/O - Transfers from the FIFO to the Host ................................................................110
Programmed I/O - Transfers from the Host to the FIFO ................................................................111
Timing Diagrams For SER_IRQ Cycle ..........................................................................................111
SER_IRQ Cycle Control ................................................................................................................112
SER_IRQ Data Frame...................................................................................................................113
Stop Cycle Control.........................................................................................................................113
Latency ..........................................................................................................................................114
EOI/ISR Read Latency ..................................................................................................................114
AC/DC Specification Issue ............................................................................................................114
Reset and Initialization ..................................................................................................................114
Keyboard Interface ........................................................................................................................115
Keyboard Data Write .....................................................................................................................116
Keyboard Data Read .....................................................................................................................116
Keyboard Command Write ............................................................................................................116
Keyboard Status Read ..................................................................................................................116
CPU-to-Host Communication ........................................................................................................116
Host-to-CPU Communication ........................................................................................................116
KIRQ..............................................................................................................................................116
MIRQ .............................................................................................................................................117
External Keyboard and Mouse Interface .......................................................................................117
Keyboard Power Management ......................................................................................................117
Soft Power Down Mode.................................................................................................................117
Hard Power Down Mode ...............................................................................................................117
DATASHEET
Page 6
SMSC LPC47M172