MT58L256V36F Micron Semiconductor, MT58L256V36F Datasheet - Page 22

• Manufacturer Part Number: MT58L256V36F
• Description: (MT58Lxxxx) 8Mb SYNCBURST SRAM
• Manufacturer: Micron Semiconductor

READ/WRITE TIMING PARAMETERS
NOTE: 1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM
MT58L512L18F_C.p65 – Rev. 2/02
BWE#, GW#,
BWa#-BWd#
SYM
t
f
t
t
t
t
t
t
t
t
t
KC
KF
KH
KL
KQ
KQX
KQLZ
KQHZ
OEQ
OELZ
OEHZ
ADDRESS
(NOTE 2)
ADSC#
ADSP#
ADV#
OE#
CLK
CE#
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When CE# is HIGH, CE2# is HIGH
3. Timing is shown assuming that the device was not enabled before entering into this sequence.
4. Outputs are disabled
Q
MIN
and CE2 is LOW.
8.8
2.5
2.5
1.5
1.5
0
-7.5
High-Z
MAX
113
7.5
4.2
4.2
4.2
t ADSS
t AS
t CES
A1
t KQLZ
t ADSH
MIN
10.0
t AH
t CEH
t KH
3.0
3.0
3.0
3.0
t OEQ
t KQ
0
t
KQHZ after deselect.
t KC
-8.5
Single READ
t WS
t KL
MAX
100
8.5
5.0
5.0
5.0
Q(A1)
t WH
t OEHZ
t ADSS
MIN
4.0
4.0
3.0
3.0
15
0
A2
-10
t ADSH
t OELZ
MAX
10.0
5.0
5.0
5.0
66
t AAS
Q(A2)
READ TIMING
t KQX
t AAH
UNITS
t KQ
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Q(A2 + 1)
(NOTE 1)
22
FLOW-THROUGH SYNCBURST SRAM
SYM
t
t
t
t
t
t
t
t
t
t
AS
ADSS
AAS
WS
CES
AH
ADSH
AAH
WH
CEH
8Mb: 512K x 18, 256K x 32/36
Q(A2 + 2)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3
ADV# suspends burst.
MIN
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
BURST
READ
-7.5
MAX
Q(A2 + 3)
MIN
1.8
1.8
1.8
1.8
1.8
0.5
0.5
0.5
0.5
0.5
-8.5
MAX
Q(A2)
Burst wraps around
to its initial state.
DON’T CARE
MIN
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
Q(A2 + 1)
©2002, Micron Technology, Inc.
-10
MAX
Deselect Cycle
(Note 4)
UNDEFINED
Q(A2 + 2)
t KQHZ
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns