MT9044 Mitel Networks Corporation, MT9044 Datasheet
MT9044
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MT9044 Summary of contents
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... The MT9044 generates ST-BUS clock and framing signals that are phase locked to either a 2.048MHz, 1.544MHz, or 8kHz input reference. The MT9044 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3, Stratum 4 Enhanced, and Stratum 4; and ETSI ETS 300 011. It will meet the jitter/wander tolerance, jitter/wander ...
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... F0o 33 LOS2 8 TSP 32 GTo 9 F8o 31 VSS 10 C1.5o 30 GTi 11 AVDD HOLDOVER 29 Figure 2 - Pin Connections Description . nominal. DC Advance Information TEST 33 RSEL 32 MS1 31 MS2 30 TDO 29 MT9044AL LOS1 28 LOS2 27 GTo 26 VSS 25 GTi 24 HOLDOVER ...
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... GTi Guard Time (Schmitt Input). This input is used by the MT9044 state machine in both Manual and Automatic modes. The signal at this pin affects the state changes between Primary Holdover Mode and Primary Normal Mode, and Primary Holdover Mode and Secondary Normal Mode. The logic level at this input is gated in by the rising edge of F8o ...
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... RST Reset (Schmitt Input). A logic low at this input resets the MT9044. To ensure proper operation, the device must be reset after changes to the method of control, reference signal frequency changes and power-up. The RST pin should be held low for a minimum of 300ns. While the RST pin is low, all frame and clock outputs are at logic high ...
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... Control, Mode and Reference Selection of the device. See Tables 1, 4 and 5. Frequency Select MUX Circuit The MT9044 operates with one of three possible input reference frequencies (8kHz, 1.544MHz or 2.048MHz). The frequency select inputs (FS1 and FS2) determine which of the three frequencies may be used at the reference inputs (PRI and SEC) ...
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... TIE Corrector Feedback Signal from Frequency Select MUX 6 Digital Phase Lock Loop (DPLL) As shown in Figure 4, the DPLL of the MT9044 consists of a Phase Detector, Limiter, Loop Filter, Digitally Controlled Oscillator, and a Control Circuit. Phase Detector - the Phase Detector compares the The new virtual ...
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... Connecting C19o to ACKi will generate a phase locked 19.44 MHz ACKo output with a nominal 50% duty cycle. The analog PLL has an intrinsic jitter of less than 0.01 U.I. In order to achieve this low jitter level a separate pin is provided to power (AVdd) the analog PLL. MT9044 C1.5o C3o C2o C4o C8o ...
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... GTi pin determines which state change occurs. When GTi=0, the state change is to Primary Holdover. Secondary Normal. Master Clock The MT9044 can use either a clock or crystal as the With master timing source. timing circuits, see the Applications - Master Clock section. Control and Modes of Operation The MT9044 can operate either in Manual or Automatic Control ...
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... SEC). The input reference signal may have a nominal frequency of 8kHz, 1.544MHz or 2.048MHz. From a reset condition, the MT9044 will take seconds for the output signal to be phase locked to the selected reference. The selection dependent as shown in State Tables 4 and 5 ...
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... degree change in temperature, while the MT9044 is in Holdover Mode may result in an additional offset (over the 0.05ppm) in frequency accuracy of 1ppm, which is much greater than the 0.05ppm of the MT9044. The other factor affecting accuracy is large jitter on the reference input prior (30ms to 60ms) to the mode switch ...
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... Primary Secondary (000) S1H Holdover Holdover Primary Secondary (010) Phase Re-Alignment Phase Continuity Maintained (without TIE Corrector Circuit) Phase Continuity Maintained (with TIE Corrector Circuit) Figure 7 - Manual Control State Diagram MT9044 State Normal Holdover Holdover (SEC) (PRI) (SEC) S2 S1H S2H S1 MTIE S1 ...
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... MT9044 Description Input Controls LOS2 LOS1 GTi RST Legend Change MTIE State change occurs with TIE Corrector Circuit Refer to Automatic Control State Diagram for state changes to and from Auto-Holdover State ...
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... Frequency Accuracy Frequency accuracy is defined as the absolute tolerance of an output clock signal when it is not locked to an external reference, but is operating in a free running mode. For the MT9044, the Freerun accuracy is equal to the Master Clock (OSCi) accuracy. Holdover Accuracy Holdover accuracy is defined as the absolute ...
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... The observation period is usually the time from the disturbance, to just after the synchronizer has settled to a steady state. In the case of the MT9044, the output signal phase continuity is maintained to within instance (over one frame) of all reference switches and all mode changes. ...
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... Manual Control operation and Automatic Control during reference operation. Master Clock The MT9044 can use either a clock or crystal as the master timing source. In Freerun Mode, the frequency tolerance at the clock outputs is identical to the frequency tolerance of the source at the OSCi pin. For applications not ...
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... CTS R1027-2BB-20.0MHZ ( 20ppm absolute, 6ppm 0C to 50C, 32pF Guard Time Adjustment Excessive switching of the timing reference (from PRI to SEC) in the MT9044 can be minimized by first entering Holdover a Crystal maximum time (i.e., guard time). If the degraded signal returns to normal before the expiry of the guard time (e ...
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... NOTES represents the time delay from when the reference goes D bad to when the MT9044 is provided with a LOS indication. Figure 13 - Automatic Control, Unsymmetrical Guard Time Circuit Timing Example For instance, 10 Normal to Holdover to Normal mode change sequences occur, and in each case Holdover was entered for 2s ...
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... LOS MT8985 STo0 STi0 STo1 STi1 F0i C4i Figure 15 - Dual T1 Reference Sources with MT9044 in 1.544MHz Automatic Control 18 Dual T1 Reference Sources with MT9044 in Automatic Control is For systems requiring simple state machine control, P the application circuit shown in Figure 15 using Automatic Control may be used. ...
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... STo0 STi0 STo1 STi1 F0i C4i Figure 16 - Dual E1 Reference Sources with MT9044 in 8kHz Manual Control Dual E1 Reference Sources with MT9044 in Manual Control For systems requiring complex state machine control, the application circuit shown in Figure 16 using Manual Control may be used. In this circuit, the MT9044 is operating Manually and is using a controller for all mode changes ...
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... OC3 link via an STS-3 Framer and optical link. The 19.44 Mhz clock required by the MT90840 is generated by the MT9044. In the event that the E1 link is broken, the LOS output of the MT9075 goes high placing the MT9044 in freerun mode. ...
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... 2 0 0.7V DD CIH V 0.3V DD CIL V 2.3 SIH V 0.8 SIL V 0.4 HYS I - MT9044 Min Max Units -0.3 7.0 V -0 -55 125 C 900 mW 900 mW ) unless otherwise stated. SS Min Max Units 4.5 5 unless otherwise stated. Units Conditions/Notes mA Outputs unloaded mA Outputs unloaded ...
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... MT9044 AC Electrical Characteristics - Performance Characteristics 1 Freerun Mode accuracy with OSCi at Holdover Mode accuracy with OSCi at Capture range with OSCi at Phase lock time 11 Output phase continuity with: 12 mode switch to Normal 13 mode switch to Freerun 14 mode switch to Holdover ...
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... F0o pulse width low 30 F8o pulse width high 31 F16o pulse width low 32 Output clock and frame pulse rise or fall time 33 Input Controls Setup Time 34 Input Controls Hold Time † See "Notes" following AC Electrical Characteristics tables. MT9044 Sym Min Max Units t 100 ...
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... MT9044 PRI/SEC 8kHz PRI/SEC 1.544MHz PRI/SEC 2.048MHz F8o NOTES: 1. Input to output delay values are valid after a TRST or RST with no further state changes Figure 19 - Input to Output Timing (Normal Mode) F8o F0o F16o t C16o C8o C4o C2o C6o C3o C1.5o C19o R15D ...
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... See "Notes" following AC Electrical Characteristics tables. t RSPD t TSPW t TSPD Figure - 21 Output Timing Sym Min Max 0.0002 0.0002 0.0002 0.030 0.040 0.060 0.120 0.080 0.160 0.320 0.0002 0.0002 0.10 MT9044 RSPW Units Conditions/Notes† UIpp 1-14,21-24,28 UIpp 1-14,21-24,28 UIpp 1-14,21-24,28 UIpp 1-14,21-24,29 UIpp 1-14,21-24,30 UIpp ...
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... MT9044 AC Electrical Characteristics - C1.5o (1.544MHz) Intrinsic Jitter Filtered Characteristics 1 Intrinsic jitter (4Hz to 100kHz filter) 2 Intrinsic jitter (10Hz to 40kHz filter) 3 Intrinsic jitter (8kHz to 40kHz filter) 4 Intrinsic jitter (10Hz to 8kHz filter) † See "Notes" following AC Electrical Characteristics tables. AC Electrical Characteristics - C2o (2.048MHz) Intrinsic Jitter Filtered ...
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... See "Notes" following AC Electrical Characteristics tables. Sym Min Max Units 2.9 UIpp 0.09 UIpp 1.3 UIpp 0.10 UIpp 0.80 UIpp 0.10 UIpp 0.40 UIpp 0.10 UIpp 0.06 UIpp 0.05 UIpp 0.04 UIpp 0.03 UIpp 0.04 UIpp 0.02 UIpp Sym Min Max Units 0.80 UIpp 0.70 UIpp 0.60 UIpp 0.20 UIpp 0.15 UIpp 0.08 UIpp 0.02 UIpp 0.01 UIpp MT9044 Conditions/Notes† 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 1-3,8,9-14,21-22,24,30,35 1-3,8,9-14,21-22,24,30,36 Conditions/Notes† 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 1-3,6,9-14,21-22,24-26,28 27 ...
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... MT9044 AC Electrical Characteristics - 1.544MHz Input Jitter Tolerance Characteristics 1 Jitter tolerance for 1Hz input 2 Jitter tolerance for 5Hz input 3 Jitter tolerance for 20Hz input 4 Jitter tolerance for 300Hz input 5 Jitter tolerance for 400Hz input 6 Jitter tolerance for 700Hz input 7 Jitter tolerance for 2400Hz input ...
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... No filter. 36. 40Hz to 100kHz bandpass filter. 37. With respect to reference input signal frequency. 38. After a RST or TRST. 39. Master clock duty cycle 40% to 60%. 40. Prior to Holdover Mode, device was in Normal Mode and phase locked. 41. 1Ulpp = 51ns for 19.44MHz signals. MT9044 29 ...
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