MT8880C Mitel Networks Corporation, MT8880C Datasheet

no-image

MT8880C

Manufacturer Part Number
MT8880C
Description
Integrated DTMFTransceiver
Manufacturer
Mitel Networks Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT8880CC
Manufacturer:
MT
Quantity:
286
Part Number:
MT8880CE
Manufacturer:
MITEL
Quantity:
5 510
Part Number:
MT8880CE
Quantity:
2 831
Part Number:
MT8880CE
Manufacturer:
N/A
Quantity:
20 000
Part Number:
MT8880CE-1
Manufacturer:
TI
Quantity:
2 974
Part Number:
MT8880CE1
Manufacturer:
Zarlink
Quantity:
2
Part Number:
MT8880CE1
Manufacturer:
ZARLINK
Quantity:
20 000
Part Number:
MT8880CN
Manufacturer:
ZARLINK
Quantity:
4
Part Number:
MT8880CN
Manufacturer:
MITEL
Quantity:
20 000
Part Number:
MT8880CP
Manufacturer:
MITEL
Quantity:
20 000
Part Number:
MT8880CS
Manufacturer:
PHILIPS
Quantity:
2 402
Features
Applications
Description
The MT8880C/C-1 is a monolithic DTMF transceiver
with call progress filter. It is fabricated in Mitel’s
ISO
dissipation and high reliability. The DTMF receiver is
TONE
OSC1
OSC2
IN+
GS
Complete DTMF transmitter/receiver
Central office quality
Low power consumption
Microprocessor port
Adjustable guard time
Automatic tone burst mode
Call progress mode
Credit card systems
Paging systems
Repeater systems/mobile radio
Interconnect dialers
Personal computers
IN-
2
-CMOS technology, which provides low power
V
+
-
DD
Oscillator
Circuit
Circuit
V
Bias
Tone Burst
Gating Cct.
Ref
Tone
Filter
Dial
V
SS
Converters
High Group
Low Group
D/A
Control
Filter
Filter
Logic
Control
Logic
Figure 1 - Functional Block Diagram
ESt
Row and
Counters
Converter
Column
and Code
Algorithm
Digital
Steering
Logic
ISO
St/GT
2
based
monolithic DTMF receiver; the transmitter utilizes a
switched capacitor D/A converter for low distortion,
high accuracy DTMF signalling. Internal counters
provide a burst mode such that tone bursts can be
transmitted with precise timing. A call progress filter
can be selected allowing a microprocessor to
analyze
microprocessor bus is provided and is directly
compatible with 6800 series microprocessors. The
MT8880C-1 is functionally identical to the MT8880C
except for the performance of the receiver section,
which is enhanced to accept and reject lower signal
levels.
-CMOS
Transmit Data
Receive Data
Register
Register
Register
Register
Status
Control
Register
MT8880CE/CE-1
MT8880CC/CC-1
MT8880CS/CS-1
MT8880CN/CN-1
MT8880CP/CP-1
Control
upon
A
B
Integrated DTMF Transceiver
call
MT8880C/MT8880C-1
the
Ordering Information
progress
-40°C to +85°C
industry
ISSUE 2
Buffer
Control
Data
Interrupt
Bus
20 Pin Plastic DIP
20 Pin Ceramic DIP
20 Pin SOIC
24 Pin SSOP
28 Pin Plastic LCC
Logic
I/O
tones.
standard
A
standard
MT8870
D0
D1
D2
D3
IRQ/CP
CS
R/W
RS0
May 1995
2
4-33

Related parts for MT8880C

MT8880C Summary of contents

Page 1

... Paging systems • Repeater systems/mobile radio • Interconnect dialers • Personal computers Description The MT8880C/C monolithic DTMF transceiver with call progress filter fabricated in Mitel’s 2 ISO -CMOS technology, which provides low power dissipation and high reliability. The DTMF receiver is D/A TONE ...

Page 2

... MT8880C/MT8880C IN+ VDD 2 19 IN- St/ ESt 17 VRef VSS D2 15 OSC1 6 D1 OSC2 TONE 8 IRQ/CP R RS0 20 PIN CERDIP/PLASTIC DIP/SOIC Pin Description Pin # Name IN+ Non-inverting op-amp input IN- Inverting op-amp input. ...

Page 3

... A standard interface allows access to an internal status register, two control registers and two data registers. Input Configuration The input arrangement of the MT8880C/C-1 provides a differential-input operational amplifier as well as a bias source (V ) which is used to bias the inputs at Ref V /2. Provision is made for connection of a ...

Page 4

... St/GT ESt (R1C1 GTA t = (R1C1 GTP MT8880C/C-1 Figure 5 - Basic Steering Circuit 4-36 2 ISO -CMOS Guard Time Adjustment The simple steering circuit shown in Figure 5 is adequate for most applications. Component values are chosen according to the formula: (see Figure The value of t Electrical Characteristics) and t signal duration to be recognized by the receiver ...

Page 5

... Design information for guard time adjustment is shown in Figure 6. The receiver timing is shown in Figure 9 with a description of the events in Figure 11. Call Progress Filter A call progress mode, using the MT8880C/C-1, can be selected allowing the detection of various tones which identify the progress of a telephone call on the network. ...

Page 6

... MT8880C/MT8880C-1 EVENTS A t REC V in ESt St/GT RX -RX DECODED TONE # (n- Read Status Register IRQ/CP of time segments is fixed at 32, however, by varying the segment length as described above the tone output signal frequency will be varied. The divider output clocks another counter which addresses the sinewave lookup ROM ...

Page 7

... Refer to Control Register B description for details. Distortion Calculations The MT8880C/C-1 is capable of producing precise tone bursts with minimal error in frequency (see Table 1). The internal summing amplifier is followed by a first-order lowpass switched capacitor filter to minimize harmonic components and intermodulation products ...

Page 8

... DTMF signals or when the transmitter is ready for more data (Burst mode only). The IRQ/CP pin is configured as an open drain output device and as such requires a pull-up resistor (see Figure 13). 2mW of MT8880C/C-1 devices can MT8880C/C-1 MT8880C/C-1 OSC1 OSC2 OSC1 OSC2 employs a microprocessor associated with ...

Page 9

... TOUT TONE OUTPUT b1 CP/DTMF MODE CONTROL b2 IRQ INTERRUPT ENABLE b3 RSEL REGISTER SELECT Table 5. Control Register A Description 2 MT8880C/MT8880C-1 ISO -CMOS b3 b2 RSEL IRQ Table 3. CRA Bit Positions b3 b2 C/R S/D Table 4. CRB Bit Positions DESCRIPTION A logic ‘1’ enables the tone output. This function can be implemented in either the burst mode or non-burst mode In DTMF mode (logic ‘ ...

Page 10

... MT8880C/MT8880C-1 BIT NAME FUNCTION b0 BURST BURST MODE b1 TEST TEST MODE b2 S/D SINGLE /DUAL TONE GENERATION b3 C/R COLUMN/ROW TONES BIT NAME b0 IRQ b1 TRANSMIT DATA REGISTER EMPTY (BURST MODE ONLY) b2 RECEIVE DATA REGISTER FULL b3 DELAYED STEERING 4-42 2 ISO -CMOS DESCRIPTION A logic ‘0’ enables the burst mode. When this mode is ...

Page 11

... The performance of the MT8880 can be optimized by keeping noise on the supply rails to a minimum. The decoupling capacitor (C3) should be connected close to the device and ground loops should be avoided. 5.0 VDC TEST POINT MMD7000 (or equivalent) Figure 14 - Test Circuit MT8880C/MT8880C 5.0 VDC ...

Page 12

... NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms (±2 ms) AFTER THE DATA IS WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms (± 4 ms) 4-44 2 ISO -CMOS +5V 3.3k Peripheral decode Figure 15 - MT8880C/C-1 to 6802 Interface Control CS RS0 R ...

Page 13

... V 4.9 OHO 2.4 2.5 Ref -1.4 -6 2.0 4 -0.5 -3 MT8880C/MT8880C-1 Min Max 6 V -0 -65 +150 1000 Max Units Test Conditions 5.25 V +85 °C 3.583124 MHz Max Units Test Conditions 5. 57 1 load ...

Page 14

... Input Signal Level Reject † Characteristics are over recommended temperature and at V MT8880C AC Electrical Characteristics Characteristics Valid Input signal levels R 1 (each tone of composite X signal) † Characteristics are over recommended operating conditions (unless otherwise stated) using the test circuit shown in Figure 13. ...

Page 15

... AH, RWH AS, RWS t 22 DHR t DDR t 45 DSW MT8880C/MT8880C-1 ) unless otherwise stated. SS Units Notes -25 dBm Hz @ -25 dBm Hz @ -25 dBm Hz @ -25 dBm dBm ) unless otherwise stated. ‡ Max Units Conditions 14 ms Note 12 8.5 ms Note ...

Page 16

... MT8880C/MT8880C-1 AC Electrical Characteristics Characteristics 28 Data hold time (write) 29 Input Capacitance (data bus) 30 Output Capacitance (IRQ/CP) 31 Crystal/clock frequency Clock input rise time Clock input duty cycle C 34 Clock input duty cycle Capacitive load (OSC2) † Timing is over recommended temperature & power supply voltages. ...

Page 17

... RS0 RWS R/W DATA BUS RS0 t RWS R/W DATA BUS 2 MT8880C/MT8880C-1 ISO -CMOS t CYC Figure Pulse t DDR t RWH t DHR Valid Data Figure 18 - MPU Read Cycle t RWH t DSW Valid Data Figure 19 - MPU Write Cycle ...

Page 18

... MT8880C/MT8880C-1 NOTES: 4-50 2 ISO -CMOS ...

Related keywords