MT9094 Mitel Networks Corporation, MT9094 Datasheet
MT9094
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MT9094 Summary of contents
Page 1
... ISO -CMOS ST-BUS Digital Telephone (DPhone-II) Description The MT9094 DPhone- fully featured integrated digital telephone circuit. Voice band signals are converted to digital PCM and vice versa by a switched capacitor Filter/Codec. uses an ingenious differential architecture to achieve low noise operation over a wide dynamic range with a single 5V supply ...
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... PWRST Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low). 7 DSTi ST-BUS Serial Stream (Input). 2048 kbit/s input stream composed of 32 eight bit channels; the first four of which are used by the MT9094. Input level is TTL compatible. 8 DSTo ST-BUS Serial Stream (Output). 2048 kbit/s output stream composed of 32 eight bit channels ...
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... Name 14 DATA 2 Serial Data Transmit alternate mode of operation, this pin is used for data transmit from MT9094. In the default mode, serial data transmit and receive are performed on the DATA 1 pin and DATA 2 is tri-stated. 15 DATA 1 Bidirectional Serial Data. Port for microprocessor serial data transfer compatible with MCS-51 standard (default mode) ...
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... MT9094 Overview The Functional Block Diagram of Figure 1 depicts the main operations performed within the DPhone-II. Each of these functional blocks will be described in the sections to follow. This overview will describe some of the end-user features which may be implemented as a direct result of the level of integration found within the DPhone-II. ...
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... Transmit Filter Gain 0 to +7dB Transmit (1 dB steps) -Law 6.1dB -Law 15.4dB ANALOG DOMAIN Figure 3 - Audio Gain Partitioning MT9094 ), for the conversion Ref ), for biasing the internal analog is also Bias Bias and V pins are situated Ref Bias ...
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... MT9094 included. This is a second implementation with a corner frequency at 25kHz. Attenuation is better than 32dB at 256 kHz and less than 0.01dB within the passband. An optional 400Hz high-pass function may be included into the transmit path by enabling the Tfhp bit in the Transducer Control Register (address 0Eh). ...
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... The sum of harmonic and noise power in the frequency band from 50Hz to 3500Hz is typically more than 30dB below the power in the tone pair. All individual harmonics are typically more than 40dB below the level of the low group tone. MT9094 into the composite signal ...
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... MT9094 Table 1 gives the standard DTMF frequencies, the coefficient required to generate frequency, the actual frequency generated and the percent deviation of the generated tone from the nominal. Tone Ringer and Gain Control Program A locally generated alerting (ringing) signal is used to prompt the user when an incoming call must be answered ...
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... On power-up reset (PWRST) or with a software reset (RST), the DATA1 pin becomes a bidirectional (transmit/receive) serial port while the DATA2 pin is internally disconnected and tri-stated. MT9094 75 1000 pF 150 ohm load (speaker) ...
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... MT9094 All data transfers through the microport are two-byte transfers requiring the transmission of a Command/ Address byte followed by the data byte written or read from the addressed register. CS must remain asserted for the duration of this two-byte transfer. As shown in Figure 5, the falling edge of CS indicates to the DPhone-II that a microport transfer is about to begin ...
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... New Call tone (0, -8, -16, -24 dB). The NCT gain bits (NCTG reside in the FCODEC Gain Control Register 2 (address 0Bh). 125 s CHANNEL 2 CHANNEL 3 CHANNELS B1-channel B2-channel Not Used Channels Figure 6 - ST-BUS Channel Assignment MT9094 EN and are enabled the default -NCTG 0 7- ...
Page 12
... MT9094 Watchdog To maintain program integrity an on-chip watchdog timer is provided for connection microcontroller reset pin. The watchdog output WD (pin 17) goes high while the DPhone-II is held in reset via the PWRST (pin 6). Release of PWRST will cause WD to return low immediately and will also start the watchdog timer. The watchdog timer is ...
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... Side-tone Gain NCTG 1 0 Setting (dB (default) OFF -9. -6. -3.32 0 3.32 6.64 9.96 ADDRESSES 0Ch and 0Dh are RESERVED MT9094 ADDRESS = 0Ah WRITE/READ VERIFY Power Reset Value X000 X000 TxFG 0 0 TxFG TxFG TxFG ...
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... MT9094 Transducer Control Register DIAL PuFC Tfhp PuFC When high, the Filter/CODEC is powered up. When low, the Filter/CODEC is powered down. If PuFC, SPKR EN and HSSPKR EN are all low then the VRef/VBias circuit is also powered down. Tfhp When high, an additional high pass function (passband beginning at 400Hz) is inserted into the transmit path. When low, this highpass filter is disabled ...
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... MT9094 ADDRESS = 11h WRITE Power Reset Value XXX0 1010 0 Power Reset Value 0000 0000 1 Power Reset Value XXXX 0000 9 ADDRESS = 14h WRITE/READ Power Reset Value Write = 1111 1111 Read = Not Applicable 7-59 ...
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... MT9094 Timing Control Register - - - All bits active high and Channels 2 and 3 are the B1 and B2 channels, respectively. PCM associated with the DSP, Filter/CODEC and trans- ducer audio paths is conveyed in one of these channels as selected in the timing control register. Transmit B1 and B2 data on DSTo When high PCM from the Filter/CODEC and DSP is transmitted on DSTo in the associated channel ...
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... Note: Bits marked "-" are reserved bits and should be written with logic "0". ADDRESS = 1Dh WRITE/READ VERIFY Gain Setting (dB) B5-B0 +22.5 1F +21.0 1E +19.5 1D +18.0 1C +16.5 1B +15.0 1A +13.5 19 +12.0 18 +10.5 17 +9.0 16 +7.5 15 +6.0 14 +4.5 13 +3.0 12 +1.5 11 +0.0 10 -1.5 0F -3.0 0E -4.5 0D -6.0 0C -7.5 0B -9.0 0A -10.5 09 -12.0 08 -13.5 07 -15.0 06 -16.5 05 -18.0 04 -19.5 03 -21.0 02 -22.5 01 -24.0 00 MT9094 Power Reset Value 0000 0000 B0 0 Gain Setting (dB) -25.5 -27.0 -28.5 -30.0 -31.5 -33.0 -34.5 -36.0 -37.5 -39.0 -40.5 -42.0 -43.5 -45.0 -46.5 -48.0 -49.5 -51.0 -52.5 -54.0 -55.5 -57.0 -58.5 -60.0 -61.5 -63.0 -64.5 -66.0 -67.5 -69.0 -70.5 -72.0 7-61 ...
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... MT9094 DSP Control Register PS2 PS1 PS0 7 6 OPT: When high, the tone ringer is in New Call tone mode. When low the normal tone ringer program is executed. RxMUTE: This bit when high turns off the receive PCM channel, substituting quiet code. ...
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... ADDRESS = 24h WRITE/READ VERIFY 1992.2 Hz 7.8 Hz 7.8 Hz 0dB ADDRESS = 26h WRITE/READ VERIFY 500 Hz 2.0 Hz MT9094 Power Reset Value 0000 0000 Power Reset Value 0000 0000 ADDRESS 25h is RESERVED Power Reset Value 0000 0000 7-63 ...
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... Figure 8 for the transmit interface. In this case the dynamic range of the MT9094 is reduced by half. In both figures the output drivers are connected in a fully differential manner. The MT9094 is a member of the Mitel family of digital terminal equipment components. There are two + - ...
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... Electret Microphone R 0.1 F VBias MT9094 LCD MT9094 330 VBias + +5V – Electret Microphone 40 nom. 32 min. 75 150 75 + 1000pF 1000pF 1000pF caps LCD are optional Note: Single-ended configurations reduce dynamic range by a factor of two ...
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... MIC+ AAAA A AAAA A AAAA A A Microphone MIC- AAAA AAAA A SPKR+ Speaker SPKR- SCLK DATA1 AS E R/W (ALE) (RD) (WR) 8051 MCS- INTEL 51 HSPKR+ HSPKR- Handset M+ MT9094 DPhone- M- MIC+ AAAA A AAAA A A AAAA Microphone AAAA A A MIC- AAAA SPKR+ Speaker SPKR- CS DATA1 INTEL MCS-51 ...
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... Address DATA 15h bits (as required) 1Eh 00h 1Dh 70h (or as required) 20h 30h (or as required) 23h as required 24h as required 26h as required 1Eh 61h 0Eh 82h 1Eh 61 (on) 69 (off) 61 (on) 69 (off) etc... MT9094 7-67 ...
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... MT9094 Generate DTMF tones Description select B-Channel of operation reset DSP set Rx DTMF gain (ie -20 dBm0) set Tx audio gain (ie 0dB) set Tx DTMF gain (ie -4dBm0) write tone coefficient 1 write tone coefficient 2 start DTMF program select transducers and filter/CODEC (PuFC) and turn off sidetone ...
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... CLK Sym Min Typ Max I 6 DDC1 I 1.5 DDF1 I 1.5 DDF3 I 1.5 DDF4 I 1.5 DDF5 I 1.0 DDF6 I 7.0 14 DDFT MT9094 Min Max Units -0 -0 ±20 mA -65 +150 C 750 mW ±2.0 KV ±100 mA Test Conditions Noise margin = 400mV Noise margin = 400mV C Units Test Conditions ...
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... MT9094 DC Electrical Characteristics otherwise stated. Characteristics 1 Input HIGH Voltage TTL inputs 2 Input LOW Voltage TTL inputs 3 VBias Voltage Output 1 4 Input Leakage Current 5 Positive Going Threshold Voltage (PWRST only) Negative Going Threshold Voltage (PWRST only) 6 Output HIGH Current TTL O/P 7 Output LOW Current TTL O/P ...
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... D 360 AX D 750 DX 380 130 750 PSSR 37 PSSR1 40 PSSR2 35 PSSR3 40 MT9094 for A-Law, at the rms Units Test Conditions Vp-p -Law Vp-p A-Law Both at CODEC dB MICA/u=0* dB MICA/u=1* MIC± or M± to PCM 1020Hz dB MICA/u=0* dB MICA/u=1* from nominal MIC± or M± to PCM 1020Hz ...
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... MT9094 † AC Characteristics for D/A (Receive) Path (V = 0.5 volts and V = 2.5 volts). All parameters pertain exclusively to the Filter/CODEC except absolute gain and receive idle Ref Bias channel noise. Characteristics 1 Analog output at the CODEC full scale 2 Absolute half-channel gain. Receive filter gain = 0dB setting All other receive filter settings ...
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... CL S 0.5 D ‡ Sym Min Typ Max V 2. MT9094 Test Conditions NCTG0=0, NCTG1=0 NCTG0=1, NCTG1=0 NCTG0=0, NCTG1=1 NCTG0=1, NCTG1=1 load > 34 ohms across SPKR± Units Test Conditions ohms across HSPKR± pF each pin: HSPKR+ HSPKR- % 300 ohms load across HSPKR± ...
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... MT9094 AC Electrical Characteristics Characteristics 1 C4i Clock Period 2 C4i Clock High Period 3 C4i Clock Low Period 4 C4i Clock Transition Time 5 F0i Frame Pulse Setup Time 6 F0i Frame Pulse Hold Time 7 F0i Frame Pulse Width Low 8 DSTo Delay 9 DSTi Setup Time 10 DSTi Hold Time † ...
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... TRANSMIT Figure 12 - Serial Microport Timing Diagram † - Microport Timing (see Figure 12) ‡ Sym Min Typ 333 MT9094 Max Units Test Conditions 7-75 ...
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... MT9094 NOTES: 7-76 ...