ISL24010 Intersil Corporation, ISL24010 Datasheet
ISL24010
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ISL24010 Summary of contents
Page 1
... It is manufactured using the Intersil’s proprietary monolithic high voltage bipolar process and is capable of driving a 3000pF load in 500ns. The ISL24010 will level shift a digital input signal to an output voltage nearly equal to its output supply voltages. The ISL24010 has 3 supplies. V ...
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... Functional Diagram Connected to V ON1 and V IN1 OFF IN2 IN3 IN4 IN5 IN6 Connected to V ON2 and V IN7 OFF IN8 2 ISL24010 OUT1 CH1 OUT2 CH2 OUT3 CH3 OUT4 CH4 OUT5 CH5 OUT6 CH6 OUT7 CH7 OUT8 CH8 ...
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... VIL Low Level Input Voltage tplh Low to High Prop Delay tphl High to Low Prop Delay ttlh Rise Time tthl Fall Time 3 ISL24010 Thermal Information = 25°C) Thermal Resistance (Typical, Note +5V to +40V ) . . . . . . +10V to +60V 20 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . I (continuous, all 8 channels 80mA OUT T ...
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... OUT1 2 20 VON1 CIRCUIT 1. 4 ISL24010 Ground pin Level shifter input 1 Level shifter input 2 Level shifter input 3 Level shifter input 4 Level shifter input 5 Level shifter input 6 Level shifter input 7 Level shifter input 8 Negative output supply for all channels Positive output supply for channels 7 and ...
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... Frequency 50kHz 35 100pF load & V ON1 ON2 FIGURE 5. RISE TIME, FALL TIME AND PROP DELAY vs V & V VOLTAGE WITH V ON1 ON2 5 ISL24010 T = 25°C, Output load parallel RC (RL = 5kΩ 100pF) unless otherwise specified. A 12.0 V OFF 10.8 9.6 8.4 7.2 6.0 4.8 V ON1 3.6 2.4 V ON2 1.2 0.0 FIGURE 2 ...
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... V & V ON1 ON2 FIGURE 11. PROP DELAY vs CAPACITANCE vs SUPPLY VOLTAGE WITH V = -5V OFF 6 ISL24010 T = 25°C, Output load parallel RC (RL = 5kΩ 100pF) unless otherwise specified. (Continued) A 2100 1890 1680 3300pF 1470 1260 1050 1800pF 840 630 420 100pF ...
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... FIGURE 13. TRANSIENT RESPONSE vs LOAD CAPACITANCE Application Information General The ISL24010 is an Octal voltage level shifter. The part was designed to level shifts a digital input signal to +22V and -5V for TFT-LCD displays. The device is capable of level shifting a CMOS logic signal between +40V and -20V. ...
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... ISL24010 OUT8 IN8 V OFF 1.0µ the output load is a series 200Ω resistor and a 3300pF then C1, C2 and C3 can be reduced to 0.47pF. INx t PHL t PLH OUTx t R FIGURE 16. TEST LOAD AND TIMING DEFINITIONS 8 ISL24010 ON1 1.0µF LCD PANEL 2 5kΩ 100pF t F ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 ISL24010 M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC M ...