ISL5961 Intersil Corporation, ISL5961 Datasheet - Page 11

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ISL5961

Manufacturer Part Number
ISL5961
Description
CommLinkTM High Speed D/A Converter
Manufacturer
Intersil Corporation
Datasheet

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Timing Diagram
R
R
ISL5961
ISL5961
EQ
EQ
PIN 21
PIN 22
PIN 21
PIN 22
AT EACH OUTPUT
= 0.5 x (R
= 0.5 x (R
FIGURE 13. OUTPUT LOADING FOR DATASHEET
AT EACH OUTPUT
FIGURE 14. ALTERNATIVE OUTPUT LOADING
D13-D0
LOAD
LOAD
I
CLK
OUT
FIGURE 15. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM
IOUTB
IOUTB
IOUTA
IOUTA
// R
// R
DIFF
DIFF
MEASUREMENTS
R
LOAD SEEN BY THE TRANSFORMER
LOAD
R
)
// R
R
R
LOAD SEEN BY THE TRANSFORMER
DIFF
DIFF
LOAD
R
R
A
REPRESENTS THE
B
11
), WHERE R
A
REPRESENTS THE
t
SU
V
V
W
OUT
OUT
0
1:1
A
=R
= (2 x IOUTA x R
= (2 x IOUTA x R
B
t
PW1
t
HLD
t
PD
R
OUTPUT=W
R
LOAD
LOAD
EQ
EQ
t
PW2
)V
)V
t
SU
W
1
-1
Propagation Delay
The converter requires two clock rising edges for data to be
represented at the output. Each rising edge of the clock
captures the present data word and outputs the previous
data. The propagation delay is therefore 1/CLK, plus <2ns of
processing. See Figure 15.
Test Service
Intersil offers customer-specific testing of CommLink
converters with a service called Testdrive. To submit a
request, fill out the Testdrive form. The form can be found by
doing an ‘entire site search’ at www.intersil.com on the
words ‘DAC Testdrive’. Or, send a request to the technical
support center.
t
HLD
t
PD
OUTPUT=W
t
SU
W
2
0
t
HLD
OUTPUT=W
W
1
3
50%

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