ISL6540A Intersil Corporation, ISL6540A Datasheet - Page 14

• Manufacturer Part Number: ISL6540A
• Description: Single-Phase Buck PWM Controller
• Manufacturer: Intersil Corporation

When MAR_CTRL is left floating, the function is disabled.
Upon UP margining, an internal buffer drives the OFS- pin
from VCC to maintain OFS+ at 0.591V. The resistor divider,
R
increased. Similarly, upon DOWN margining, an internal
buffer drives the OFS+ pin from VCC to maintain OFS- at
0.591V. The resistor divider, R
voltage at OFS+ to be increased. In both modes the voltage
difference between OFS+ and OFS- is then sensed with an
instrumentation amplifier and is converted to the desired
margining voltage by a 5:1 ratio. The maximum designed
margining range of the ISL6540A is ±200mV, this sets the
MINIMUM value of R
for an R
The OFS pins are completely independent and can be set to
different margining levels. The maximum usable reference
voltage for the ISL6540A is VCC-1.8V, and should not be
exceeded when using the margining functionality, i.e,
V
An alternative calculation provides for a desired percentage
change in the output voltage when using the internal 0.591V
reference:
When not used in a design OFS+, OFS-, and MARCTRL
should be left floating. To prevent damage to the part, OFS+
and OFS- should not be tied to VCC or PVCC.
Reference Output Buffer
The internal buffer’s output tracks the unmargined system
reference. It has a 19mA drive capability, with maximum and
minimum output voltage capabilities of VCC and GND
respectively. Its capacitive loading can range from 1μF to
above 17.6μF, which is designed for 1 to 8 DIMM systems in
DDR (Dual Data Rate) applications. 1μF of capacitance
should always be present on REFOUT. It is not designed to
drive a resistive load and any such load added to the system
should be kept above 300kΩ total impedance. The
Reference Output Buffer should not be left floating.
Reference Input
The REFIN pin allows the user to bypass the internal 0.591V
reference with an external reference. Asynchronously if
REFIN is NOT within ~1.8V of VCC, the external reference
pin is used as the control reference instead of the internal
0.591V reference. The minimum usable REFIN voltage is
~68mV while the maximum is VCC - 1.8V - V
present).
V
V
V
MARG_DOWN
PCT_UP
MARG
REF_MARG
MARG_UP
MARG
and R
=
20
=
< VCC - 1.8V.
OFS+
V
-------------- -
of 10K for a MAXIMUM of 1V across R
•
=
REF
R
-------------------- -
5
R
V
-------------- -
MARG
OFS+
REF
5
, causes the voltage at OFS- to be
•
OFS+
R
-------------------- -
R
•
MARG
OFS+
R
-------------------- -
R
MARG
OFS-
or R
14
MARG
V
OFS-
pct_DOWN
at approximately 5.9K
and R
=
OFS-
20
MARG
•
, causes the
R
-------------------- -
R
MARG
OFS-
(if
MARG
ISL6540A
.
Internal Reference and System Accuracy
The internal reference is trimmed to 0.591V. The total DC
system accuracy of the system is within ±0.68% over
commercial temperature range, and ±1.00% over industrial
temperature range. System accuracy includes error amplifier
offset, OTA error, and bandgap error. Differential remote
sense offset error is not included. As a result, if the
differential remote sense is used, then an extra 1.9mV of
offset error enters the system. The use of REFIN may add
up to 2.2mV of additional offset error.
Differential Remote Sense Buffer
The differential remote sense buffer is essentially an
instrumentation amplifier with unity gain. The offset is
trimmed to 1.5mV for high system accuracy. As with any
instrumentation amplifier typically 6μA are sourced from the
VSEN- pin. The output of the remote sense buffer is
connected directly to the internal OV/UV comparator. As a
result, a resistor divider should be placed on the input of the
buffer for proper regulation, as shown in Figure 6. The
VMON pin should be connected to the FB pin by a standard
feed-back network. A small capacitor, C
be added to filter out noise, typically C
corresponding time constant does not reduce the overall
phase margin of the design, typically this is 2x to 10x
switching frequency of the regulator.
As some applications will not use the differential remote
sense, the output of the remote sense buffer can be disabled
(high impedance) by pulling VSEN- within 1.8V of VCC. As
the VMON pin is connected internally to the OV/UV/PGOOD
comparator, an external resistor divider must then be
connected to VMON to provide correct voltage information
for the OV/UV comparator. An RC filter should be used if
VMON is to be connected directly to FB instead of to VOUT
through a separate resistor divider network. This filter
prevents noise injection from disturbing the OV/UV/PGOOD
comparators on VMON. VMON may also be connected to
the SS pin, which completely bypasses the OV/UV/PGOOD
functionality.
REFOUT
REFIN
REFERENCE
V
REF
FIGURE 5. SIMPLIFIED REFERENCE BUFFER
=0.591V
MARGINING
BLOCK
VCC
800mV
V
REF_MARG
SEN
SEN
is chosen so the
in Figure 6, can
MACHINE
ISL6540A
STATE
March 12, 2007
OTA
FN6288.2