ISL8105B Intersil Corporation, ISL8105B Datasheet
ISL8105B
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ISL8105B Summary of contents
Page 1
... Buck Converter PWM Controller with Integrated MOSFET Gate Drivers, Extended Soft-Start Time The ISL8105B is a simple single-phase PWM controller for a synchronous buck converter. It operates from +5V or +12V bias supply voltage. With integrated linear regulator, boot diode, and N-Channel MOSFET gate drivers, the ISL8105B reduces external component count and board space requirements ...
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... RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Typical Application V BIAS +5V OR +12V C DCPL ISL8105B PART MARKING TEMP. RANGE (° +70 - +70 - +1V TO +12V ...
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Block Diagram SAMPLE AND HOLD 21.5µA TO BGATE/BSOC FB 5V INT. 0.4V 20µA COMP/EN POR AND + SOFT-START - OC COMPARATOR 5V INT. PWM COMPARATOR 0. ERROR AMP DIS + - OSCILLATOR FIXED 300kHz VBIAS D ...
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... BIAS Ambient Temperature Range ISL8105BC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C ISL8105BI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Junction Temperature Range .-40°C to +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... BGATE function may leave off the BSOC part of the name, when it is not relevant to the discussion. VBIAS (SOIC Pin 5, DFN Pin 6) This pin provides the bias supply for the ISL8105B, as well as the bottom-side MOSFET's gate and the BOOT voltage for the top-side MOSFET's gate. An internal 5V regulator will supply bias if V rises above 6 ...
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... T0, and the output ramps between T1 and T2. If the output is pre-biased to a voltage less than the expected value, as shown by the green curve, the ISL8105B will detect that condition. Neither MOSFET will turn on until the soft-start ramp voltage exceeds the output seamlessly ramping from there ...
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... If the shorted condition is not removed, this cycle will continue indefinitely. Following POR (and 6.8ms delay), the ISL8105B initiates the T2 Overcurrent Protection sample and hold operation. The BGATE driver is disabled to allow an internal 21.5µA current ...
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... BSOC BSOC range for typical MOSFETs is typically in the 20mV to 120mV 8 ISL8105B ballpark (500Ω to 3000Ω). If the voltage drop across R is set too low, that can cause almost continuous OCP tripping and retry. It would also be very sensitive to system noise and inrush current spikes should be avoided. The maximum usable setting is around 0.2V across R (0.4V across the MOSFET) ...
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... Output Voltage Selection The output voltage can be programmed to any level between the 0.6V internal reference the V ISL8105B can run at near 100% duty cycle at zero load, but the r of the top-side MOSFET will effectively limit it to DS(ON) something less as the load current increases ...
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... LX) to increase. If the IN voltage level of the LX is increased to a level that exceeds the maximum voltage rating of the ISL8105B, then the IC will experience an irreversible failure and the converter will no longer be operational. Ensuring that there is a path for the current to follow other than the capacitance on the rail will prevent this failure mode ...
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... The compensation network consists of the error amplifier (internal to the ISL8105B) and the external R components. The goal of the compensation network is to provide a closed loop transfer function with high 0dB crossing frequency (F phase margin (better than +45°). Phase margin is the difference between the closed loop phase at F The equations that follow relate the compensation network’ ...
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... Include worst case component variations when determining phase margin. The mathematical model presented makes a number of approximations and is generally not accurate at frequencies approaching or exceeding half the switching 12 ISL8105B frequency. When designing compensation networks, select ⋅ ⋅ target crossover frequencies in the range of 10% to 30% of ...
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... Given a sufficiently fast control loop design, the ISL8105B will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time required to slew the inductor current from an initial current value to the transient current level ...
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... BOOT to GND). This will make the TGATE V equal to (12V - 5V = 7V). That should be high enough to 14 ISL8105B × × × × ISL8105B 1 ) ⋅ × × × (EQ. 14) + FIGURE 12. UPPER GATE DRIVE - BOOTSTRAP OPTION ...
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... INDEX AREA (DATUM N (Nd-1)Xe REF. BOTTOM VIEW C L (A1 SECTION "C-C" FOR ODD TERMINAL/SIDE 15 ISL8105B L10.3x3C 0. LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE 2X 0. SYMBOL 0. 0. NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL8105B M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE ...