ISL9217 Intersil Corporation, ISL9217 Datasheet
ISL9217
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ISL9217 Summary of contents
Page 1
... Cell Li-Ion Battery Overcurrent Protection and Analog Front End Chip Set The ISL9216 and ISL9217 chipset provides overcurrent protection and voltage monitoring for multi-cell li-ion battery packs consisting cells. When used together, these devices provide integrated overcurrent protection circuitry, ...
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... Pinouts ISL9217 (UPPER) (24 LD 4X4 QFN) TOP VIEW CB7 1 VCELL6 2 CB6 3 VCELL5 4 CB5 5 VCELL4 ISL9216, ISL9217 20 19 RGO 18 SDAI 17 VC7/VCC AO 16 SDAIHV NC 15 VCELL6 VSS 14 WKUPR CB1 13 VCELL5 11 12 VCELL4 ISL9216 (LOWER) (32 LD 5X5 QFN) TOP VIEW ...
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... VSS WKUPR VC7/VCC VCELL6 VCELL5 LEVEL CB5 SHIFTERS/ VCELL4 CELL BALANCE CB4 CIRCUITS VCELL3 CB3 VCELL2 CB2 VCELL1 CB1 BACKUP SUPPLY 3 ISL9216, ISL9217 CELL VOLTAGES MUX 7 REGISTERS POWER CONTROL I AO WKUP SCL SCLHV SDAIHV SDAOHV HVI2C LEVEL/SHIFTERS CELL VOLTAGES MUX 7 OVERCURRENT ...
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... Regulated Output Voltage. This pin connects to the emitter of an external NPN transistor and works in conjunction with the RGC pin to provide a regulated 3.3V. The voltage at this pin provides feedback for the regulator and power for many of the ISL9216 and ISL9217 internal circuits. For the ISL9216, this output also provides the 3.3V output voltage for the microcontroller and other external circuits. ...
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... SYMBOL WKUPR Wake-up Upper Device Signal (ISL9216 only). This output wakes up the ISL9217 (upper device) when the output is turned on by the microcontroller. Once the upper device is awake, this output can be turned off. SDA Serial Data (ISL9216 only). This is the bi-directional data line for an I SCL Serial Clock ...
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... See Tech Brief TB379. JC Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating Conditions, Unless Otherwise Specified. DESCRIPTION Operating Voltage ...
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... Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating Conditions, Unless Otherwise Specified. (Continued) DESCRIPTION Overcurrent Detection Threshold (Charge) Voltage Relative to DSREF (Default in Boldface) Short Current Detection Threshold (Discharge) Voltage Relative to DSREF (Default in Boldface) ...
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... Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating Conditions, Unless Otherwise Specified. (Continued) DESCRIPTION OVER-TEMPERATURE PROTECTION SPECIFICATIONS Internal Temperature Shutdown Threshold Internal Temperature Hysteresis Internal Over-Temperature Turn-on Delay Time External Temperature Output Current ...
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... Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating Conditions, Unless Otherwise Specified. (Continued) DESCRIPTION WAKE-UP/SLEEP SPECIFICATIONS Device WKUP Pin Voltage Threshold (WKUP pin active HIGH rising edge) Device WKUP Pin Hysteresis (WKUP pin active HIGH) ...
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... Operating Specifications All Specifications Apply to Both the ISL9216 and ISL9217 Separately Over the Recommended Operating Conditions, Unless Otherwise Specified. (Continued) DESCRIPTION Stop Condition Hold Time Data Output Hold Time SDA and SCL Rise Time SDA and SCL Fall Time Capacitive Loading of SDA or SCL ...
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... Wake-up Timing (WKPOL = 0) V WKUP2 WKUP PIN WKUP BIT Wake-up Timing (WKPOL = 1) V WKUP1 WKUP PIN WKUP BIT Change in Voltage Source, FET Control SCL SDA AO DFET (ISL9216 ONLY) CFET (ISL9216 ONLY) 11 ISL9216, ISL9217 <t WKUP <t WKUP t WKUP <t WKUP <t WKUP t WKUP BIT BIT BIT BIT ...
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... V DSENSE t SCD ‘0’ DOC BIT ‘0’ DSC BIT TEMP3V OUTPUT 12V DFET OUTPUT 12 ISL9216, ISL9217 635ms 3.3V HIGH IMPEDANCE OVER-TEMPERATURE THRESHOLD DELAY TIME = 1ms MONITOR TEMP DURING THIS TIME PERIOD t OCD ‘1’ 3.3V REGISTER 1 READ FET SHUTDOWN AND CELL BALANCE TURN-OFF (IF ENABLED) (Assumes DENOCD and DENSCD bits are ‘ ...
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... SDA INPUT SDA OUTPUT This timing shows the communication with the ISL9216. Communication with the ISL9217 (through the ISL9216) adds some lag time, however, overall the communication with the ISL9217 meets the same timing requirements as communication with the ISL9216. Symbol Table ...
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... The shaded registers are not used in the ISL9217 device. Shaded status registers return ‘0’ when read. Shaded “read/write” registers can be read and written, but they provide no functionality. When writing to the shaded areas in the ISL9217, the locations must be written as “0”. ...
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... Status Registers BIT FUNCTION 7 CU Indicates the device is an ISL9217. This bit is set in hardware and cannot be changed. Cascade Indicates the device is an ISL9216. This bit is set in hardware and cannot be changed. Cascade Reserved for ISL9208 devices. 4 WKUP This bit is set and reset by hardware. ...
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... Cell2 Cell2 OFF x x Cell3 Cell3 OFF x x Cell4 Cell4 OFF x x Cell5 Cell5 OFF x x Cell6 ON/WKUPR On (Note 13 Cell6 OFF/WKUPR OFF (Note 13 Cell7 ON (ISL9217 only Cell7 OFF (ISL9217 only) FN6488.1 November 2, 2007 ...
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... Setting this bit to “0” turns off the discharge FET. This bit is automatically reset in the event of a discharge overcurrent or discharge short circuit condition, unless the automatic response is disabled by the DENOCD or DENSCD bits. 17 ISL9216, ISL9217 TABLE 5. ANALOG OUT CONTROL REGISTER (ADDR: 03H) BIT 0 AO0 ...
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... ISL9216, ISL9217 FUNCTION When set to ‘0’, a discharge overcurrent condition automatically turns off the FETs. When set to ‘1’, a discharge overcurrent condition will not automatically turn off the FETs. In either case, this condition sets the DOC bit, which also turns on the TEMP3V output. ...
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... Setting this bit to “1” sets the device to wake- rising edge at the WKUP pin. Setting this bit to “0” sets the device to wake- falling edge at the WKUP pin. CAUTION: Setting this pin to ‘1’ in the ISL9217 prevents a wake-up condition. If the device then goes to sleep, it cannot be waken without power cycling the device. ...
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... VCELL1 CB1 VSS 20 ISL9216, ISL9217 TABLE 10. WRITE ENABLE REGISTER (ADDR: 08H) When set to “1”, allows writes to the Feature Set register. When set to “0”, prevents writes to the Feature Set register (Addr: 07H). Default on initial power-up is “0”. When set to “1”, allows writes to the Charge Set register. When set to “0”, prevents writes to the Feature Set register (Addr: 06H). Default on initial power-up is “ ...
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... ISL9216, ISL9217 WKUPR pin of the ISL9216 connects to the ISL9217 WKUP pin. When the ISL9216 WKUPR bit is set to “1”, the ISL9217 WKUP pin pulls low and the ISL9217 wakes up. Because of this operation important that the WKPOL bit of the ISL9217 remain in the default state (ISL9217 WKPOL = 0). ...
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... Or, the microcontroller could wait 22 ISL9216, ISL9217 until the pack is removed from the charger and then re- attached. An alternative method of providing the protection function, if desired by the designer turn off the automatic safety response ...
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... As long as the AO3:AO0 bits point to the external temperature, the TEMP3V output remains on. 23 ISL9216, ISL9217 Because of the manual scan of the temperature, it may be desired to turn off the automatic scan, although they can be used at the same time without interference. To turn off the automatic scan, set the ATMPOFF bit ...
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... Analog Multiplexer Selection The ISL9216 and ISL9217 devices can be used to externally monitor individual battery cell voltages and temperatures. Each quantity can be monitored at the analog output pin (AO) 2 and is selected using the I C interface ...
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... P- (discharge) are likely always positive. For the cascaded combination of ISL9216 and ISL9217, a zener diode (D2 in Figure 8) needs the ISL9216 VMON path to the P- pin to protect the ISL9216 from an overvoltage condition when the FETs open due to a short circuit or overcurrent condition ...
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... User Flags The ISL9216 and ISL9217 each contain four flags in the register area that the microcontroller can use for general purpose indicators. These bits are designated UFLG3, UFLG2, UFLG1, and UFLG0. The microcontroller can set or reset these bits by writing into the appropriate register. ...
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... The serial interface between cascaded ISL9216 and ISL9217 devices has one clock and two data lines. There is also a high voltage reference for this commication link. See Figure 15. The interface lines are: • SCLHV, which is a level shifted clock from the lower device (ISL9216) to the upper device (ISL9217) ...
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... However, even though the ISL9216 ignores the data, it still passes it through to the ISL9217. The SDAI and SDAO pins of the ISL9217 need to have pull- up resistors of approximately 4.7kΩ, since the output drivers are open-drain devices. ...
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... VCELL4 CB4 VCELL3 CB3 VCELL2 CB2 4.7µF VCELL1 CB1 V SS MINIMIZE LENGTH MAXMIZE GAUGE DSREF B- FIGURE 17. 12-CELL CASCADED APPLICATION CIRCUIT WITH INTEGRATED CHARGE/DISCHARGE 29 ISL9216, ISL9217 ISL9217 SCL SDAI SDAO WKUP RGC RGO ISL9216 SDAIHV HVI2C SDAOHV 10M SCLHV SCL SDA WKUP RGC 1µ ...
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... VCELL4 CB4 VCELL3 CB3 VCELL2 CB2 4.7µF VCELL1 CB1 V SS MINIMIZE LENGTH MAXMIZE GAUGE DSREF B- FIGURE 18. 12-CELL CASCADED APPLICATION CIRCUIT WITH SEPARATE CHARGE/DISCHARGE 30 ISL9216, ISL9217 ISL9217 SCL SDAI SDAO WKUP RGC RGO ISL9216 SDAIHV HVI2C SDAOHV 10M SCLHVL SCL SDA WKUP RGC 1µ ...
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... VCELL3 CB3 VCELL2 CB2 4.7µF VCELL1 CB1 V SS MINIMIZE LENGTH MAXMIZE GAUGE DSREF B- FIGURE 19. 12-CELL CASCADED APPLICATION CIRCUIT WITH SEPARATE CHARGE/DISCHARGE AND SWITCH WAKE-UP 31 ISL9216, ISL9217 ISL9217 SCL SDAI SDAO WKUP RGC RGO ISL9216 SDAIHV HVI2C SDAOHV SCLHV SCL SDA WKUP RGC 1µ ...
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... L24.4x4D 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/06 4.00 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 32 ISL9216, ISL9217 4X A 20X 24X ± BOTTOM VIEW ± SIDE VIEW ( 20X 24X 24X 0 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 33 ISL9216, ISL9217 L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-2 ISSUE C ...