TISP1082F3 Power Innovations Limited, TISP1082F3 Datasheet

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TISP1082F3

Manufacturer Part Number
TISP1082F3
Description
DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS
Manufacturer
Power Innovations Limited
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TISP1082F3SL
Manufacturer:
BOURNS/伯恩斯
Quantity:
20 000
Copyright © 1997, Power Innovations Limited, UK
description
P R O D U C T
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
These dual asymmetrical transient voltage
suppressors are designed for the overvoltage
protection of ICs used for the SLIC (Subscriber
Line Interface Circuit) function. The IC line driver
section is typically powered with 0 V and a
negative supply. The TISP1xxxF3 limits voltages
that exceed these supply rails and is offered in
two voltage variants to match typical negative
supply voltage values.
High voltages can occur on the line as a result of
exposure to lightning strikes and a.c. power
surges. Negative transients are initially limited by
breakdown clamping until the voltage rises to the
WAVE SHAPE
Small-outline taped
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
Planar Passivated Junctions
Low Off-State Current < 10 µA
Rated for International Surge Wave Shapes
Surface Mount and Through-Hole Options
UL Recognized, E132482
DEVICE
‘1072F3
‘1082F3
10/1000 µs
0.5/700 µs
10/160 µs
10/560 µs
10/700 µs
2/10 µs
8/20 µs
Small-outline
Single-in-line
Plastic DIP
PACKAGE
and reeled
V
- 58
- 66
DRM
V
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
CCITT IX K17/K20
I N F O R M A T I O N
ANSI C62.41
FCC Part 68
FCC Part 68
FCC Part 68
STANDARD
REA PE-60
VDE 0433
FTZ R12
V
RLM 88
- 72
- 82
(BO)
V
PART # SUFFIX
DR
SL
D
P
I
TSP
80
70
60
45
38
50
50
50
35
A
device symbol
Specified T terminal ratings require connection of pins 1 and 8.
Specified R terminal ratings require connection of pins 4 and 5.
breakover level, which causes the device to
crowbar. The high crowbar holding current
prevents d.c. latchup as the current subsides.
Positive transients are limited by diode forward
conduction. These protectors are guaranteed to
suppress and withstand the listed international
lightning surges on any terminal pair
DUAL ASYMMETRICAL TRANSIENT
Terminals T, R and G correspond to the
alternative line designators of A, B and C
G
R
T
SEPTEMBER 1993 - REVISED SEPTEMBER 1997
NC
NC
NC - No internal connection
R
T
G
G
R
T
T
SL PACKAGE
D PACKAGE
P PACKAGE
(TOP VIEW)
(TOP VIEW)
(TOP VIEW)
VOLTAGE SUPPRESSORS
1
2
3
1
2
3
4
1
2
3
4
TISP1072F3, TISP1082F3
G
SD1XAA
8
7
6
5
8
7
6
5
R
G
G
R
T
G
G
G
G
MDXXAG
MDXXAE
MDXXAF
MD1XAA
1

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TISP1082F3 Summary of contents

Page 1

... Positive transients are limited by diode forward conduction. These protectors are guaranteed to suppress and withstand the listed international lightning surges on any terminal pair TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 D PACKAGE (TOP VIEW) ...

Page 2

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 description (continued) These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation The small-outline 8-pin assignment has been carefully chosen for these devices to maximise the inter-pin clearance and creepage distances which are used by standards (e ...

Page 3

... W DRM = 100 - TEST CONDITIONS 25°C tot FR4 PCB TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TISP1072F3 TISP1082F3 MAX MIN TYP MIN TYP -10 -72 -78 -92 -0.1 -0.6 -0.1 3.3 3 -0.15 -0 ...

Page 4

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 PARAMETER MEASUREMENT INFORMATION V (BR)M V DRM - (BR) DRM V (BR) I (BO) V (BO) Quadrant III Switching Characteristic Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINALS R AND AND G V (BR)M V DRM - (BR) DRM V (BR) ...

Page 5

... TYPICAL CHARACTERISTICS R and and G terminals TC1LAF I (BR) 80.0 70.0 60.0 75 100 125 150 -25 TC1LAC 100 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE = 1 mA '1082F3 V (BO) V (BR) V (BR)M '1072F3 V (BO) V (BR) V (BR)M 0 ...

Page 6

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE 1·0 0·9 0·8 0·7 0·6 0·5 I (BO) 0·4 0· 0·2 0·1 0·09 0·08 0·07 - Junction Temperature - °C J Figure 7. PEAK FORWARD RECOVERY VOLTAGE ...

Page 7

... Third Terminal = 0 to -50 V 100 10 -25 0·1 0·3 SURGE CURRENT vs DECAY TIME 2 10 100 Decay Time - µs Figure 13. TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE Terminal Bias = 0 '1072F3 '1082F3 '1072F3 Terminal Bias = -50 V '1082F3 0 ...

Page 8

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 OFF-STATE CURRENT vs JUNCTION TEMPERATURE 100 V = ± 0·1 0·01 0·001 - Junction Temperature - °C J Figure 14. HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE 1·0 0·9 0·8 0·7 0·6 0· ...

Page 9

... Terminal Voltage - V Figure 18. THERMAL INFORMATION TI1LAA = 250 Vrms GEN 100 = 10 to 150 P Package 10 1 0·0001 0·001 100 1000 TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 TC1LAP 50 THERMAL RESPONSE D Package P Package SL Package 0·01 0· 100 t - Power Pulse Duration - s Figure 20 ...

Page 10

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 electrical characteristics The electrical characteristics of a TISP are strongly dependent on junction temperature, T characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters’ ...

Page 11

... Normalised 100 Bias 100 V - RMS AC Test Voltage - mV d Figure 21. TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 , the total series resistance In practice the , and the bias voltage, comprising J . The capacitance is essentially d AIXXAA 1000 11 ...

Page 12

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 longitudinal balance Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, C and the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge wire R is biased at a larger potential than wire T then C ...

Page 13

... Places Pin Spacing 0,229 (0.0090) 1,27 (0.050) 0,190 (0.0075) (see Note A) 6 Places TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 Designation per JEDEC Std 30: PDSO-G8 5,21 (0.205) 4,60 (0.181) 7° NOM 4 Places 1,12 (0.044) 0,51 (0.020) 4° ...

Page 14

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0 ...

Page 15

... DUAL ASYMMETRICAL TRANSIENT MECHANICAL DATA 8,31 (0.327) MAX 12,9 (0.492) MAX 4,267 (0.168) MIN 3 Pin Spacing 2,54 (0.100) T.P. (see Note A) 2 Places TISP1072F3, TISP1082F3 VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 4,57 (0.180) MAX 6,60 (0.260) 6,10 (0.240) 0,356 (0.014) 0,203 (0.008) 3 Places MDXXAD 15 ...

Page 16

... TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 D008 tape dimensions D008 Package (8 pin SOIC) Single-Sprocket Tape 8,05 7,95 6,50 6,30 Carrier Tape Embossment NOTES: A. Taped devices are supplied on a reel of the following dimensions:- Reel diameter: Reel hub diameter: Reel axial hole: B ...

Page 17

... PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS IMPORTANT NOTICE Copyright © 1997, Power Innovations Limited TISP1072F3, TISP1082F3 DUAL ASYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS SEPTEMBER 1993 - REVISED SEPTEMBER 1997 17 ...

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