TISP2072F3 Power Innovations Limited, TISP2072F3 Datasheet
TISP2072F3
Related parts for TISP2072F3
TISP2072F3 Summary of contents
Page 1
... D DR device symbol P SL These fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 D PACKAGE (TOP VIEW ...
Page 2
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 description (Continued) The small-outline 8-pin assignment has been carefully chosen for the TISP series to maximise the inter-pin clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand ratings ...
Page 3
... TSM I TSP -i TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 = 25°C (Continued) J TISP2072F3 TISP2082F3 MIN MAX MIN MAX ±72 ±82 ±84† ±94† ±0.15 ±0.6 ±0.15 ±0.6 ±3 ± ...
Page 4
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 † Typical value of the parameter, not a limit value. thermal characteristics R Junction to free air thermal resistance JA OFF-STATE CURRENT vs JUNCTION TEMPERATURE 100 0·1 0·01 0·001 - Junction Temperature - °C J Figure 2 ...
Page 5
... NORMALISED BREAKOVER VOLTAGE RATE OF RISE OF PRINCIPLE CURRENT TC2LAM 1.3 1.2 1.1 1.0 100 125 150 0·001 di/dt - Rate of Rise of Principle Current - A/µs TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 ON-STATE CURRENT vs ON-STATE VOLTAGE 25°C -40° ...
Page 6
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE (POSITIVE) Third Terminal Bias = -50 V 100 Third Terminal Bias = 0 10 Third Terminal Bias = 0·1 1 Terminal Voltage (Positive Figure 8. 100 ...
Page 7
... Third Terminal Bias = -50 V 100 10 100 125 150 SURGE CURRENT vs DECAY TIME 100 Decay Time - µs Figure 13. TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE Terminal Bias = 0 Terminal Bias = - 100 T - Junction Temperature - ° ...
Page 8
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 OFF-STATE CURRENT vs JUNCTION TEMPERATURE 100 V = ± 0·1 0·01 0·001 - Junction Temperature - °C J Figure 14. 2.5 2.0 1.5 1 TYPICAL CHARACTERISTICS ...
Page 9
... THERMAL INFORMATION TI2LAA = 250 Vrms GEN 100 = 10 to 150 10 1 100 1000 0·0001 0·001 TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE (NEGATIVE) Third Terminal Bias = -50 V Third Terminal Bias = 0 Third Terminal Bias = ...
Page 10
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 electrical characteristics The electrical characteristics of a TISP are strongly dependent on junction temperature, T characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters’ ...
Page 11
... Normalised 100 Bias 100 V - RMS AC Test Voltage - mV d Figure 21. TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 , the total series resistance In practice the , and the bias voltage, comprising J . The capacitance is essentially d AIXXAA 1000 11 ...
Page 12
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 longitudinal balance Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, C and the true terminal pair capacitance measured with a three terminal or guarded capacitance TR bridge. If wire R is biased at a larger potential than wire T then C ...
Page 13
... Places Pin Spacing 0,229 (0.0090) 1,27 (0.050) 0,190 (0.0075) (see Note A) 6 Places TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 Designation per JEDEC Std 30: PDSO-G8 5,21 (0.205) 4,60 (0.181) 7° NOM 4 Places 1,12 (0.044) 0,51 (0.020) 4° ...
Page 14
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0 ...
Page 15
... MECHANICAL DATA 8,31 (0.327) MAX 12,9 (0.492) MAX 4,267 (0.168) MIN 3 Pin Spacing 2,54 (0.100) T.P. (see Note A) 2 Places TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 4,57 (0.180) MAX 6,60 (0.260) 6,10 (0.240) 0,356 (0.014) 0,203 (0.008) 3 Places MDXXAD 15 ...
Page 16
... TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 D008 tape dimensions D008 Package (8 pin SOIC) Single-Sprocket Tape 8,05 7,95 6,50 6,30 Carrier Tape Embossment NOTES: A. Taped devices are supplied on a reel of the following dimensions:- Reel diameter: Reel hub diameter: Reel axial hole: B ...
Page 17
... PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS IMPORTANT NOTICE Copyright © 1997, Power Innovations Limited TISP2072F3, TISP2082F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 17 ...