S80C186EC20 Intel, S80C186EC20 Datasheet - Page 36
S80C186EC20
Manufacturer Part Number
S80C186EC20
Description
16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR
Manufacturer
Intel
Datasheet
1.S80C186EC20.pdf
(57 pages)
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80C186EC 188EC 80L186EC 188EC
Relative Timings (80C186EC-25 20 13 80L186EC-16 13)
NOTES
1 Assumes equal loading on both pins
2 Can be extended using wait states
3 Interrupt resolution time is the delay between an unmasked interrupt request going active and the interrupt output of the
8259A module going active This is not directly measureable by the user For interrupt pin INT7 the delay from an active
signal to an active input to the CPU would actually be twice the T
modules
4 See INTA Cycle Waveforms for definition
5 To guarantee interrupt is not spurious
Serial Port Mode 0 Timings (80C186EC-25 20 13 80L186EC-16 13)
NOTES
1 See Figure 13 for Waveforms
2 n is the value in the BxCMP register ignoring the ICLK bit
36
Symbol
RELATIVE TIMINGS
T
T
T
T
T
T
T
T
T
T
T
T
XLXL
XLXH
XLXH
XHXL
XHXL
QVXH
QVXH
XHQX
XHQX
XHQZ
DVXH
XHDX
TXD Clock Period
TXD Clock Low to Clock High (N
TXD Clock Low to Clock High (N
TXD Clock High to Clock Low (N
TXD Clock High to Clock Low (N
RXD Output Data Setup to TXD
Clock High (N
RXD Output Data Setup to TXD
Clock High (N
RXD Output Data Hold after TXD
Clock High (N
RXD Output Data Hold after TXD
Clock High (N
RXD Output Data Float after Last
TXD Clock High
RXD Input Data Setup to TXD
Clock High
RXD Input Data Setup after TXD
Clock High
Parameter
l
e
l
e
1)
1)
1)
1)
l
e
l
e
1)
1)
1)
1)
(n
(n
b
T (n
b
IRES
2T
2T
T
T
T
T
T
1) T
Min
1)T
b
b
b
b
a
b
b
0
a
value since the signal must pass through two 8259A
35
35
35
35
20
35
35
b
b
1)
35
35
(n
b
2T
T
T
T
1) T
Max
a
a
a
a
35
35
20
35
a
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1 2
1 2
1 2
1
1
1
1
1
1
1
1
1
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