IDT72805LB15PFI8 IDT, Integrated Device Technology Inc, IDT72805LB15PFI8 Datasheet - Page 15

• Manufacturer Part Number: IDT72805LB15PFI8
• Description: IC FIFO SYNC DUAL 256X18 128TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT72805LB15PFI8

• Function: Synchronous
• Memory Size: 4.6K (256 x 18)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72805LB15PFI8

NOTES:
1. n = PAE offset.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. PAE is asserted LOW on RCLK transition and reset to HIGH on WCLK transition.
5. Select this mode by setting (FL, RXI, WXI) = (0,0,0), (0,0,1), (0,1,0), (0,1,1) or (1,1,1) during Reset.
WCLK
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFO
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
RCLK
WEN
D
Q
WCLK
PAE
REN
RCLK
0
0
WEN
-D
REN
-Q
LD
LD
15
15
Figure 13. Asynchronous Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
t
CLKH
t
PAE OFFSET
CLKH
t
CLK
t
Figure 11. Write Programmable Registers (IDT Standard and FWFT Modes)
CLK
t
t
ENS
ENS
t
t
t
DS
ENS
ENS
t
n + 1 words in FIFO
CLKL
t
CLKL
n words in FIFO
Figure 12. Read Programmable Registers (IDT Standard Mode)
t
UNKNOWN
CLKH
PAF OFFSET
t
t
ENH
DH
t
ENH
(2) ,
t
(3)
A
t
ENS
t
CLKL
15
PAE OFFSET
t
ENH
t
PAEA
TM
t
ENS
n + 1 words in FIFO
n + 2 words in FIFO
D
0
-D
PAF OFFSET
11
PAE OFFSET
t
PAEA
COMMERCIAL AND INDUSTRIAL
(2) ,
(3)
TEMPERATURE RANGES
n + 1 words in FIFO
n words in FIFO
PAE OFFSET
JANUARY 13, 2009
3139 drw 11
3139 drw 12
3139 drw 13
(2) ,
(3)