IDT723626L15PF8 IDT, Integrated Device Technology Inc, IDT723626L15PF8 Datasheet - Page 26

• Manufacturer Part Number: IDT723626L15PF8
• Description: IC FIFO SYNC 256X36X2 128QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT723626L15PF8

• Function: Synchronous
• Memory Size: 18.4K (256 x 36 x 2)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 723626L15PF8

NOTES:
1. t
2. If Port C size is word or byte, t
C0-C17
A0-A35
IDT723626/723636/723646 CMOS TRIPLE BUS SyncFIFO™
WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 and 1,024 x 36 x 2
WENC
If the time between the CLKC edge and the rising CLKA edge is less than t
cycle later than shown.
CLKC
CLKA
W/RA
SKEW1
MBC
ORA
MBA
CSA
ENA
IRC
is the minimum time between a rising CLKC edge and a rising CLKA edge for ORA to transition HIGH and to clock the next word to the FIFO2 output register in three CLKA cycles.
t
t
ENS2
ENS2
HIGH
FIFO2 Empty
t
LOW
LOW
LOW
DS
Write 1
Figure 18. ORA Flag Timing and First Data Word Fall through when FIFO2 is Empty (FWFT Mode)
SKEW1
t
DH
is referenced to the rising CLKC edge that writes the last word or byte write of the long word, respectively.
t
DS
Old Data in FIFO2 Output Register
Write 2
t
SKEW1
t
t
t
ENH
ENH
DH
(1)
t
CLKH
1
SKEW1
t
CLK
, then the transition of ORA HIGH and load of the first word to the output register may occur one CLKA
t
CLKL
26
2
t
CLKH
t
CLK
t
CLKL
3
t
A
t
ENS2
t
COMMERCIAL TEMPERATURE RANGE
REF
t
REF
t
ENH
W1
3271 drw19