IDT723626L15PF8 IDT, Integrated Device Technology Inc, IDT723626L15PF8 Datasheet - Page 8

• Manufacturer Part Number: IDT723626L15PF8
• Description: IC FIFO SYNC 256X36X2 128QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT723626L15PF8

• Function: Synchronous
• Memory Size: 18.4K (256 x 36 x 2)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 723626L15PF8

NOTES:
1. Industrial temperature range product is available by special order.
2. Requirement to count the clock edge as one of at least four needed to reset a FIFO.
3. Skew time is not a timing constraint for proper device operation and is only included to illustrate the timing relationship among CLKA cycle, CLKB cycle, and CLKC cycle.
4. Design simulated, not tested (typical values).
TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY VOLT-
AGE AND OPERATING FREE-AIR TEMPERATURE
(Commercial: V
IDT723626/723636/723646 CMOS TRIPLE BUS SyncFIFO™
WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 and 1,024 x 36 x 2
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
S
DS
BES
SDS
FWS
DH
ENH
FSH
BEH
SDH
SPH
CLK
CLKH
CLKL
ENS1
ENS2
RSTS
FSS
SPMS
SENS
RSTH
SPMH
SENH
SKEW1
SKEW2
Symbol
(3)
(3,4)
Clock Frequency, CLKA, CLKB, or CLKC
Clock Cycle Time, CLKA, CLKB, or CLKC
Pulse Duration, CLKA, CLKB, or CLKC HIGH
Pulse Duration, CLKA, CLKB, OR CLKC LOW
Setup Time, A0-A35 before CLKA↑ and C0-C17 before CLKC↑
Setup Time, CSA and W/RA before CLKA↑; CSB before CLKB↑
Setup Time, ENA and MBA before CLKA↑; RENB and MBB before CLKB↑ ;
WENC and MBC before CLKC↑
Setup Time, MRS1, MRS2, PRS1, or PRS2 LOW before CLKA↑ or CLKB↑
Setup Time, FS0 and FS1 before MRS1 and MRS2 HIGH
Setup Time, BE/FWFT before MRS1 and MRS2 HIGH
Setup Time, SPM before MRS1 and MRS2 HIGH
Setup Time, FS0/SD before CLKA↑
Setup Time, FS1/SEN before CLKA↑
Setup Time, BE/FWFT before CLKA↑
Hold Time, A0-A35 after CLKA↑ and C0-C17 after CLKC↑
Hold Time, CSA, W/RA, ENA, and MBA after CLKA↑; CSB, RENB, and MBB
after CLKB↑; WENC and MBC after CLKC↑
Hold Time, MRS1, MRS2, PRS1 or PRS2 LOW after CLKA↑ or CLKB↑
Hold Time, FS0 and FS1 after MRS1 and MRS2 HIGH
Hold Time, BE/FWFT after MRS1 and MRS2 HIGH
Hold Time, SPM after MRS1 and MRS2 HIGH
Hold Time, FS0/SD after CLKA↑
Hold Time, FS1/SEN HIGH after CLKA↑
Hold Time, FS1/SEN HIGH after MRS1 and MRS2 HIGH
Skew Time, between CLKA↑and CLKB↑ for EFB/ORB and FFA/IRA; between
CLKA↑ and CLKC↑ for EFA/ORA and FFC/IRC
Skew Time, between CLKA↑ and CLKB↑ for AEB and AFA; between CLKA↑ and
CLKC↑ for AEA and AFC
CC
= 5.0V ±10%, T
A
= 0°C to +70°C)
Parameter
8
(2)
(2)
Min.
IDT723626L12
IDT723636L12
IDT723646L12
7.5
7.5
7.5
0.5
0.5
0.5
0.5
12
12
—
5
5
3
4
3
5
3
3
0
4
2
2
2
2
5
COMMERCIAL TEMPERATURE RANGE
Max.
Commercial
83
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IDT723626L15
IDT723636L15
IDT723646L15
Min.
4.5
4.5
7.5
7.5
7.5
7.5
—
15
12
6
6
4
5
4
4
0
1
1
4
2
2
2
1
1
2
66.7
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns