HMP8170CN Intersil Corporation, HMP8170CN Datasheet - Page 18

• Manufacturer Part Number: HMP8170CN
• Description: NTSC/PAL Video Encoder
• Manufacturer: Intersil Corporation

NUMBER
NUMBER
NUMBER
NUMBER
BIT
BIT
BIT
BIT
7-5
1-0
7-0
7-0
4
3
2
1
0
7
6
5
4
3
2
Reserved
Closed Caption
Line 21
Write Status
Closed Caption
Line 284
Write Status
WSS
Line 20
Write Status
WSS
Line 283
Write Status
Reserved
Software Reset
General
Power Down
Power Down
NTSC/PAL 1
Output DAC
Power Down
NTSC/PAL 2
Output DAC
Power Down
Y Output DAC
Power Down
C Output DAC
Reserved
Line 21 Caption
LSB Data
Line 21 Caption
MSB Data
FUNCTION
FUNCTION
FUNCTION
FUNCTION
18
0 = Caption_21A and Caption_21B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
0 = Caption_284A and Caption_284B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
0 = WSS_20A, WSS_20B, CRC_20A, and CRC_20B data registers contain
unused data
1 = Data has been output, host processor may now write to the registers
0 = WSS_283A and WSS_283B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
Setting this bit to “1” initiates a software reset. It is automatically reset to a “0” after the reset
sequence is complete.
This bit powers down all DAC outputs and most of the digital circuitry.
0 = Normal operation
1 = Power down mode
This bit powers down only the NTSC/PAL 1 DAC output.
0 = Normal operation
1 = Power down mode
This bit powers down only the NTSC/PAL 2 DAC output.
0 = Normal operation
1 = Power down mode
This bit powers down only the Y DAC output.
0 = Normal operation
1 = Power down mode
This bit powers down only the C DAC output.
0 = Normal operation
1 = Power down mode
This register is cascaded with the closed caption_21B data register and they are read out
serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A
data register is shifted out first.
This register is cascaded with the closed caption_21A data register and they are read out
serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A
data register is shifted out first.
HMP8170, HMP8171, HMP8172, HMP8173
TABLE 24. CLOSED CAPTION_21A DATA REGISTER
TABLE 25. CLOSED CAPTION_21B DATA REGISTER
TABLE 22. HOST CONTROL REGISTER 1
TABLE 23. HOST CONTROL REGISTER 2
SUB ADDRESS = 0E
SUB ADDRESS = 0F
SUB ADDRESS = 10
SUB ADDRESS = 11
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
H
RESET
RESET
RESET
RESET
STATE
STATE
STATE
STATE
000
00
80
80
1
1
1
1
0
0
0
0
0
0
0
B
B
B
B
B
B
B
B
B
B
B
B
H
H
B