LTC2274 Linear Technology, LTC2274 Datasheet - Page 24

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LTC2274

Manufacturer Part Number
LTC2274
Description
105Msps Serial Output ADC
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS INFORMATION
Initial Frame Synchronization
In the absence of a frame clock, it is necessary to deter-
mine the start of each frame through a synchronization
process. To establish frame synchronization, Figures 14
and 15 illustrate the following sequence:
• The receiver issues a synchronization request via the
• If the synchronization request is active for more than
LTC2274
24
synchronization interface.
one ENC clock cycle, the LTC2274 will transmit a
synchronization preamble. When the ISMODE pin is
low the transmitted preamble will consist of consecu-
tive K28.5 comma symbols in conformance with the
JESD204 specifi cation. When the ISMODE pin is high,
a series of idle ordered sets will be transmitted. The
idle ordered sets consist of a K28.5 comma followed by
either D5.6 or D16.2 as defi ned in IEEE Std 802.3-2002
part3, Clause 36.2.4.12.
SERIAL DATA OUT
PARALLEL DATA
ANALOG INPUT
8B/10B DATA
INTERNAL
INTERNAL
ENC
+
N – 6
N – 9
Figure 13. Timing Relationship of Analog Sample to Serial Data Out
N – 10
t
BIT
N
t
H
t
AP
t
CONV
N – 5
N – 8
N – 9
t
L
N + 1
N – 4
N – 7
• The receiver searches for the expected preamble and
• The receiver deactivates the synchronization request.
• Upon detecting the deactivation of the synchroniza-
• At the start of the next frame, the LTC2274 will begin
• The receiver designates the fi rst data character received
N – 8
LAT
waits for the correct reception of an adequate number
of preamble characters.
tion request, the LTC2274 continues to transmit the
synchronization preamble until the end of the frame.
transmitting data characters.
after the preamble transmission to be the start of the
frame. The fi rst octet of the frame contains the most
signifi cant byte of the ADC’s output word.
P
N + 2
N + 8
N + 3
N
N – 1
N + 9
N + 4
N + 1
N
2274 F13
N + 10
2274f

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