LTC2274 Linear Technology, LTC2274 Datasheet - Page 6

• Manufacturer Part Number: LTC2274
• Description: 105Msps Serial Output ADC
• Manufacturer: Linear Technology

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LTC2274
range, otherwise specifi cations are at T
TIMING CHARACTERISTICS
SYMBOL PARAMETER
f
t
t
t
t
t
t
t
t
t
t
LAT
LAT
LAT
POWER REQUIREMENTS
SYMBOL PARAMETER
V
P
OV
I
I
P
range, otherwise specifi cations are at T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND (unless otherwise
noted).
Note 3: When these pin voltages are taken below GND or above V
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
Note 4: V
wave with 1.6V common mode, input range = 2.25V
drive (PGA = 0), unless otherwise specifi ed.
Note 5: Integral nonlinearity is defi ned as the deviation of a code from
a “best fi t straight line” to the transfer curve. The deviation is measured
from the center of the quantization band.
6
S
CONV
L
H
AP
BIT
JIT
R
SU
HD
CS
VDD
OVDD
DD
SHDN
DIS
, t
DD
, UI
P
SC
SD
F
DD
Sampling Frequency
Conversion Period
ENC Clock Low Time
ENC Clock High Time
Sample-and-Hold Aperture Delay
Period of a Serial Bit
Total Jitter of CMLOUT± (P-P)
Differential Rise and Fall Time of CMLOUT± (20% to 80%) R
SYNC to ENC Clock Setup Time
ENC Clock to SYNC Hold Time
ENC Clock to SYNC Delay
Pipeline Latency
Latency from SYNC Active to COMMA Out
Latency from SYNC Release to DATA Out
Analog Supply Voltage
Shutdown Power
Output Supply Range
Analog Supply Current
Output Supply Current
Power Dissipation
= 3.3V, f
SAMPLE
= 105MHz differential ENC
A
A
DD
= 25°C. A
= 25°C. (Note 4)
CONDITIONS
SHDN Pins = V
CMLOUT Directly-Coupled 50Ω to OV
CMLOUT Directly-Coupled 100Ω Differential (Note 7)
CMLOUT AC-Coupled (Note 7)
DC Input
CMLOUT Directly-Coupled, 50Ω to 0V
CMLOUT Directly-Coupled 100Ω Differential
CMLOUT AC-Coupled
DC Input
without latchup.
P-P
+
/ENC
with differential
The
IN
The
–
l
= –1dBFS. (Note 4)
= 2V
denotes the specifi cations which apply over the full operating temperature
DD
l
DD
denotes the specifi cations which apply over the full operating temperature
P-P
, they
sine
CONDITIONS
(Note 9)
(Note 7)
(Note 7)
BER = 1E–12 (Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
TERM
= 50Ω, C
Note 6: Offset error is the offset voltage measured from –1/2LSB when the
output code fl ickers between 0000 0000 0000 0000 and 1111 1111 1111
1111 in 2’s complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: V
differential drive.
Note 9: Recommended operating conditions.
Note 10: The dynamic current of the switched capacitors analog inputs
can be large compared to the leakage current and will vary with the sample
rate.
Note 11: Leakage current will have higher transient current at power up.
Keep drive resistance at or below 1k.
DD
DD
L
= 2pF
(Note 7)
DD
= 3.3V, f
l
l
l
l
l
l
l
l
SAMPLE
l
l
l
l
l
l
MIN
= 105MHz input range = 2.25V
3.1
3.1
2.5
t
20
50
HD
2
3.135
MIN
1.2
1.4
1.4
t
CONV
4.762
4.762
TYP
1/f
110
0.7
9
3
2
1300
TYP
394
3.3
S
16
16
/20
5
8
t
CONV
MAX
0.35
3.465
105
MAX
1485
25
25
V
V
V
450
DD
DD
DD
– t
P-P
SU
with
UNITS
UNITS
Cycles
Cycles
Cycles
MHz
2274f
mW
mW
mA
mA
mA
mA
ns
ns
ns
ps
ns
ns
ns
UI
V
V
V
V
s
s