LTC2274 Linear Technology, LTC2274 Datasheet - Page 30

• Manufacturer Part Number: LTC2274
• Description: 105Msps Serial Output ADC
• Manufacturer: Linear Technology

www.datasheet4u.com
APPLICATIONS INFORMATION
LTC2274
Table 2. Sample Rate Ranges
30
PLL Operation
The PLL has been designed to accommodate a wide range
of sample rates. The SRR0 and SRR1 pins are used to
confi gure the PLL for the intended sample rate range.
Table 2 summarizes the sample clock ranges available
to the user.
SRR1
0
1
1
SRR0
x
0
1
CODE GROUP 1
CODE GROUP 2
TRANSMIT
TRANSMIT
2274 F18
NO
CODE-GROUPS 1 AND 2
IF SCRAM IS ENABLED
SCRAMBLE ADC DATA
GENERATE 8B/10B
CODE GROUP 2
60Msps > FS ≥ 105Msps
20Msps > FS ≥ 35Msps
30Msps > FS ≥ 65Msps
SAMPLE RATE RANGE
TRANSMIT
ENABLED?
NO
IS FAM
START
AS CODE GROUP 2
TRANSMIT K28.7
CODE GROUP 2
Figure 18. Data Transmission Flow Diagram
GROUP 2 =
IS CODE
OF LAST
FRAME?
NO
YES
(FRAME ALIGNMENT MONITORING IS ENABLED)
TRANSMITTED
WAS K28.7
FRAME?
IN LAST
NO
YES
CODE GROUP 1
TRANSMIT
ENABLED?
CODE GROUP 2
IS SCRAM
TRANSMIT
Serial Test Patterns
To facilitate testing of the serial interface, three test patterns
are selectable via pins PAT0 and PAT1. The available test
patterns are described in Table 3. A K28.5 comma may be
used as a fourth test pattern by requesting synchronization
through the SYNC
Table 3. Test Patterns
YES
PAT1
CODE GROUP 2
0
0
1
1
YES
TRANSMIT
NO
(DATA SCRAMBLING IS ENABLED)
GROUP 2 =
IS CODE
D28.7?
PAT0
0
1
0
1
+
/SYNC
AS CODE GROUP 2
TRANSMIT K28.7
1+ x
YES
–
1+ x
pins.
(8B/10B Code Group D21.5)
14
9
+ x
+ x
1010101010 Pattern
END
11
15
TEST PATTERNS
Pseudo Random Pattern
Pseudo Random Pattern
ADC Data
2274f