spd6722qcce Intel Corporation, spd6722qcce Datasheet
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PD6710/’22 ISA-to-PC-Card (PCMCIA) Controllers The PD6710 and PD6722 are single-chip PC Card (PCMCIA) controller solutions capable of controlling one (PD6710) or two (PD6722) PC Card sockets. The chips are compliant with PC Card Standard, PCMCIA 2.1, and JEIDA 4.1 and ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, May 2001 *Third-party brands and names are the property of their respective owners. ...
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Contents 1.0 Product Features 2.0 General Conventions 2.1 Numbers and Units..............................................................................................11 3.0 Pin Information 3.1 Pin Diagrams.......................................................................................................13 3.2 Pin Description Conventions ...............................................................................14 3.3 Pin Descriptions ..................................................................................................16 3.4 Power-On Configuration Summary .....................................................................25 4.0 Introduction ................................................................................................................27 4.1 System Architecture ............................................................................................27 4.1.1 PC ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 8.3 System I/O Map 0–1 Start Address High ............................................................ 60 8.4 System I/O Map 0–1 End Address Low .............................................................. 60 8.5 System I/O Map 0–1 End Address High ............................................................. 61 8.6 Card I/O Map 0–1 ...
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Preventing Dual Interpretation of DMA Handshake Signals...................99 15.4.4 Turning On DMA System .....................................................................100 15.4.5 The DMA Transfer Process ..................................................................100 15.4.6 Terminal Count to Card at Conclusion of Transfer ..............................100 16.0 Electrical Specifications 16.1 Absolute Maximum Ratings...............................................................................101 16.2 DC Specifications ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figures 1 System Block Diagram........................................................................................ Card Controller Form Factor ......................................................................... 10 3 PD6710 Pin Diagram ......................................................................................... 13 4 PD6722 Pin Diagram .......................................................................................... 14 5 Memory Window Organization ............................................................................ 29 6 I/O Window ...
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Tables 1 ISA Bus Interface Pins ........................................................................................16 2 Socket Interface Pins ..........................................................................................20 3 General-Purpose Strobe / Voltage Sense Pins ...................................................24 4 Power Control Pins..............................................................................................24 5 Power and Ground Pins ......................................................................................25 6 Pin Usage Summary ...........................................................................................25 7 Chip Configuration at Power-up ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Revision History Revision Date 1.0 May 2001 8 Description Initial release. Datasheet ...
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Product Features • Single-chip PC Card (PCMCIA) controllers • Direct connection to ISA (PC AT) bus and one or two PC Card sockets • Compliant with PC Card Standard, PCMCIA 2.1, and JEIDA 4.1 • 82365SL-compatible register set, ExCA ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 1. System Block Diagram ISA (AT) BUS Figure 2. PC Card Controller Form Factor 10 PD6710 144-Pin PD6722 208-Pin 1 3/8" Card V CC and PD6710 V PP 144-Pin LQFP Switch- ing Cir- cuitry ...
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General Conventions The following general conventions apply to this document. Throughout this document, PD67XX means PD6710 and PD6722. Bits within words and words within various memory spaces are generally numbered with a 0 (zero) as the least-significant bit or ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 3.0 Pin Information The PD6710 is available in a 144-pin VQFP (very tight-pitch quad flat pack) component package and the PD6722 is available in either a 208-pin PQFP (plastic quad flat pack) component package or ...
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Pin Diagrams Figure 3. PD6710 Pin Diagram IRQ3 109 ISA_VCC SA7 110 IRQ4 111 SA8 112 IRQ5 113 SA9 114 SA10 115 IRQ7 116 SA11 117 SA12 118 REFRESH* 119 SA13 120 SA14 121 SA15 122 SA16 123 IOR* ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 4. PD6722 Pin Diagram LA23 157 IOCS16* 158 SBHE* 159 ISA_VCC MEMCS16* 160 SA0 161 SA1 162 CLK 163 SA2 164 SA3 165 ALE 166 SA4 167 SA5 168 SA6 169 IRQ3 170 SA7 ...
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An asterisk (*) at the end of a pin name indicates an active-low signal for the ISA bus or that is a general interface for the PD67XX. • Pins marked with a dagger (†) in the pin description tables ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Power Type B_SOCKET_VCC: powered from the Socket and 51 of Socket B ISA_VCC: powered from the ISA bus power 4 supply CORE_VDD: usually powered from the lowest available power supply for lowest ...
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Table 1. ISA Bus Interface Pins (Sheet Pin Name Description Memory Read: This input indicates that a MEMR* host memory read cycle is occurring. Connect to ISA signal MEMR*. Memory Write: This input indicates that a MEMW* ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 1. ISA Bus Interface Pins (Sheet Pin Name Description Interrupt Request: These outputs indicate programmable interrupt requests generated from any of a number of card actions. Although there is no specific ...
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Table 1. ISA Bus Interface Pins (Sheet Pin Name Description Speaker Out / Chip Select: This I/O pin can be used as a digital output to a speaker to allow a system to support a PC Card’s ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 2. Socket Interface Pins (Sheet Pin Name Description Register Access: In Memory Card Interface mode, this output chooses between attribute and common memory. In I/O Card Interface mode for non-DMA ...
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Table 2. Socket Interface Pins (Sheet Pin Name Description Write Enable: For non-DMA transfers, this signal goes active (low) to indicate a memory write to the socket. During a DMA read (when -IOWR is active), this ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 2. Socket Interface Pins (Sheet Pin Name Description Card Detect: These inputs indicate to the PD67XX the presence of a card in -CD[2:1] the socket. They are pulled high internally ...
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Table 2. Socket Interface Pins (Sheet Pin Name Description Battery Voltage Detect 2 / Speaker / LED: In Memory Card Interface mode, this input serves as the BVD2 or battery warning status input. In I/O Card ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 3. General-Purpose Strobe / Voltage Sense Pins Pin Name Description General-Purpose Strobe: Connect A_GPSTB to pin 43 and B_GPSTB to pin Card socket. This pin can GPSTB be used with external ...
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Table 5. Power and Ground Pins Pin Name Description This pin is connected to the system’s 5-volt power supply. In systems where 5 volts is not +5V available, this pin can be connected to the system’s 3.3-volt supply (but 5-volt-only ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 7. Chip Configuration at Power-up for Socket Support SPKR_OUT*/C_SEL Level at Rising Edge of PWRGOOD Socket Interface Support High Low 26 PD6710 Interface Support PC Card Socket 0 PC Card Socket 0 3E0 Index ...
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Introduction 4.1 System Architecture This section describes PC Card basics, windowing, interrupts, PD67XX power management, socket power management, write FIFO, bus sizing, programmable PC Card timing, and ATA and DMA mode operation. 4.1.1 PC Card Basics PCMCIA is an ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Having five memory windows per socket allows a memory-type card to be accessed through four memory windows programmed for common memory access (allowing PC-type expanded- memory-style management), leaving the fifth memory window available to be ...
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Figure 5. Memory Window Organization ISA Memory Address Space System Memory Map End Address Registers Memory Window System Memory Map Start Address Registers Figure 6. I/O Window Organization ISA I/O Address Space System I/O Map End Address Registers System I/O ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 4.1.3 PD67XX Functional Blocks Figure 7. Functional Block Diagram Per Chip Per Socket Control Address Bus Operation Interface Registers Unit Data Synthe- Clock sizer INTR Interrupt Control IRQs 4.1.4 Interrupts The PD67XX provides ten interrupt ...
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Connection of Interrupt Pins IRQ interrupts in PC-compatible systems are not generally shared by hardware. Therefore, each device in the system using IRQ interrupts must have a unique interrupt line. Additionally, many software applications assume that certain I/O devices use ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers IRQ15/RI_OUT* is programmed as RI_OUT* by programming the IRQ15 Is RI Out bit (Misc Control 2 register 1Eh bit 7) to ‘1’. Then if a particular socket supporting a modem is to have its BVD1/-STSCHG/-RI ...
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Low-Power Dynamic mode is transparent to the ISA bus. After reset, the PD67XX is configured for Low-Power Dynamic mode. This mode can be turned off by setting Misc Control 2 register, bit 1 to ‘0’. When in Low-Power Dynamic mode, ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 8. PD67XX Power-Management Modes PWRGOOD Mode Name AEN Level Low-Power Dynamic High Normal (Default) Normal High Normal Suspend High Normal (Software Controlled) Super-Suspend Static High (Hardware High Controlled) 1 Reset Low 1. IOR*, IOW*, ...
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Control register bit 5 is ‘1’ ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers byte lane on which the transfer is to occur. The data is transferred to/from the data bus (see Table 9). • 8-Bit Transfer from 8-Bit Processor — The CPU puts the address on the bus. ...
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The Index register (see registers the CPU will access next. The value in the Index register is called the Register Index. This number specifies a unique internal register. The Data register is used by the CPU to read and write ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers out dx, ax mov al, Index_Reg mov ah, user_data out dx, ax ;Read from Extension Control 1 register example ;Code section mov dx, PD67XX_Index mov al, Extended_Index mov ah, Ext_Cntrl_1 out dx, ax mov al, ...
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Register Description Conventions Register Headings The description of each register starts with a header containing the following information: Header Field Description Register Name Indicates the register name. The Index value through which an internal 1 Index register in an ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit Naming Conventions The following keywords are used within bit and field names: Keyword Description Indicates that the function described in the Enable rest of the bit name is active when the bit is ‘1’. ...
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Operation Registers The PD67XX internal registers are accessed through a pair of Operation registers — an Index register and a Data register. The Index register is accessed at address 03E0h, and the Data register is accessed at 03E1h. 6.1 ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers . Figure 10. Device/Socket/Register Index Space Possible with two PD67XXs When viewed as a 8-bit value, the contents of the Index register completely specify a single internal-register byte. For example, when the value of this ...
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Table 11. Index Registers (Sheet Register Name System Memory Map 0 Start Address Low System Memory Map 0 Start Address High System Memory Map 0 End Address Low System Memory Map 0 End Address High Card Memory ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 11. Index Registers (Sheet Register Name 3 Extended Index: Scratchpad Data Mask 0 Data Mask 1 Extension Control 1 (formerly DMA Control) Maximum DMA Acknowledge Delay Reserved External Data Extension Control ...
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The Data register is accessed at 03E1h. This register indicates the contents of the register at the Device/Socket/Register Index selected by the Index register. Datasheet ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22 45 ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 7.0 Chip Control Registers 7.1 Chip Revision Register Name: Chip Revision Index: 00h Bit 7 Bit 6 Interface ID R:10 1. Value for the current stepping only. Bits 3:0 — Revision This field indicates compatibility ...
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Interface Status Register Name: Interface Status Index: 01h Bit 7 Bit 6 Bit 5 -VPP_VALID RDY Card Power V Valid Ready/Busy R Bit 7 is the inversion of the value of the -VPP_VALID ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 4 — Write Protect 0 Card is not write protected. 1 Card is write protected. This bit indicates the state of the WP/-IOIS16 pin ( Memory Card Interface mode. Bit 5 — Ready/Busy* 0 ...
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Table 12. Enabling of Socket Power Controls Power Control Register PWRGOOD Level Bit 4: Bit 5: V Power Auto- Power CC Low X X High 0 X High 1 0 High 1 1 High 1 1 Table 13. Enabling of ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bits 1:0 — Power Power PP Bit 1 Bit Under conditions where V These bits are intended to be used ...
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Interrupt and General Control Register Name: Interrupt and General Control Index: 03h Bit 7 Bit 6 Bit 5 Ring Indicate Card Reset* Card Is I/O Enable RW:0 RW:0 RW:0 Bits 3:0 — Card IRQ Select 0000 IRQ disabled 0001 ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 5 — Card Is I/O Memory Card Interface mode: card socket configured to support memory cards. Dual-function 0 socket interface pins perform memory card-type interface functions. I/O Card Interface mode: card socket configured to ...
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Bit 0 — Battery Dead Or Status Change A transition (from high to low for memory card support or either high to low or low to high for I/O 0 card support) on the BVD1/-STSCHG pin has not occurred since ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 7.6 Management Interrupt Configuration Register Name; Management Interrupt Configuration Index: 05h Bit 7 Bit 6 Bit 5 Management IRQ Select RW:0000 This register controls which status changes may cause management interrupts and at which pin ...
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Bit 3 — Card Detect Enable 0 Card Detect Change management interrupt disabled Card Detect Change is ‘1’, a management interrupt will occur. When this bit is ‘1’, a management interrupt will occur when the Card Status Change ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 0 — Memory Map 0 Enable 0 Memory Mapping registers for Memory Space 0 disabled. 1 Memory Mapping registers for Memory Space 0 enabled. When this bit is ‘1’, the Memory Mapping registers for ...
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Bit 6 — I/O Map 0 Enable 0 I/O Mapping registers for I/O Space 0 disabled. 1 I/O Mapping registers for I/O Space 0 enabled. When this bit is ‘1’, the I/O Mapping registers for I/O Space 0 will be ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 8.0 I/O Window Mapping Registers The I/O windows must never include 3E0h and 3E1h. 8.1 I/O Window Control Register Name: I/O Window Control Index: 07h Bit 7 Bit 6 Bit 5 Timing Compatibility Auto-Size I/O ...
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Bit 4 — I/O Window 1 Size 0 8-bit data path to I/O Window 1. 1 16-bit data path to I/O Window 1. When bit 5 below is ‘0’, this bit determines the size of the data path to I/O ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bits 7:0 — Start Address 7:0 This register contains the least-significant byte of the address that specifies the beginning of the I/O space within the corresponding I/O map. I/O accesses that are equal or above ...
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Index System I/O Map End Address Low Ah System I/O Map 0 End Address Low Eh System I/O Map 1 End Address Low Bits 7:0 — End Address 7:0 This register contains the least-significant byte of the address that specifies ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 8.6 Card I/O Map 0–1 Offset Address Low Register Name: Card I/O Map 0–1 Offset Address Low Index: 36h, 38h Bit 7 Bit 6 Bit 5 1. This bit must be programmed to ‘0’. There ...
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Bits 15:8 — Offset Address 15:8 This register contains the most-significant byte of the Offset Address. See the description of the End Address field associated with bits 7:1 of the Card I/O Map 0–1 Offset Address Low register (see “Card ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 9.0 Memory Window Mapping Registers The following information about the memory map windows is important: • The memory window mapping registers determine where in the ISA memory space and PC Card memory space accesses will ...
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Bits 7:0 — Start Address 19:12 This register contains the least-significant byte of the address that specifies where in the memory space the corresponding memory map will begin. Memory accesses that are equal or above this address and equal or ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 9.3 System Memory Map 0–4 End Address Low Register Name: System Memory Map 0–4 End Address Low Index: 12h, 1Ah, 22h, 2Ah, 32h Bit 7 Bit 6 Bit 5 There are five separate System Memory ...
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System Memory Map 2 End Address High 2Bh System Memory Map 3 End Address High 33h System Memory Map 4 End Address High 9.4.0.1 Bits 3:0 — End Address 23:20 This field contains the most-significant four bits of the ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bits 7:0 — Offset Address 19:12 This register contains the least-significant byte of the quantity that will be added to the host memory address, which will determine where the memory access will occur in the ...
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Bit 7 — Write Protect 0 Writes to the card through this window are allowed. 1 Writes to the card through this window are inhibited. This bit determines whether writes to the card through this window are allowed. This bit ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 10.0 Extension Registers 10.1 Misc Control 1 Register Name: Misc Control 1 Index: 16h Bit 7 Bit 6 Bit 5 Inpack Scratchpad Bits Enable RW:0 RW: some versions of the PD6722, this bit ...
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Figure 11. Pulse Mode Interrupts High-Z -INTR or IRQ[XX] Bit 3 — Pulse System IRQ 0 RDY/-IREQ generated interrupts are passed to the IRQ[XX] pin as level-sensitive. When a RDY/-IREQ interrupt occurs, the IRQ[XX] pin is driven with the pulse ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 10.2 FIFO Control Register Name: FIFO Control Index: 17h Bit 7 Bit 6 Bit 5 Empty Write FIFO RW 1. Because a write will flush the FIFO, these scratchpad bits should be used only when ...
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Bit 0 — Bypass Frequency Synthesizer 0 Normal operation, internal clock = CLK input frequency x 7/4. 1 Internal clock = CLK input frequency (see This bit determines internal time base. Bit 1 — Low-Power Dynamic Mode 0 Clock runs ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 5 — Three-State Bit This bit enables floppy change bit compatibility. Bit 6 — DMA System (PD6722 only) 0 Configured for non-DMA mode on the PD6722. 1 Configured for DMA mode ...
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Bits 4:1 — PD67XX Revision Level This field identifies the revision of the controller. The initial value is ‘111’. Bit 5 — Dual/Single Socket* 0 Chip identified as a single-socket controller. 1 Chip identified as a dual-socket controller. This bit ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 1 — Speaker Is LED Input 0 Normal operation. The PC Card -SPKR pin will be used to drive IRQ12 if Drive LED Enable (see 1 LED Enable” on page This bit changes the ...
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Extended Index Register Name: Extended Index Index: 2Eh Bit 7 Bit 6 Bit 5 In the PD6722 only, this register controls which of the following registers at index 2Fh can be accessed: Register Name at Index 2Fh Scratchpad Data ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 10.7.1 Data Mask 0–1 Register Name: Data Mask 0–1 Index: 2Fh Bit 7 Bit 6 Bit 5 Data Mask 0 is the mask register for I/O Map 0. For each bit set in the Data ...
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Bit 2 — LED Activity Enable 0 LED activity disabled. 1 LED activity enabled. This bit allows the LED_OUT* pin to reflect any activity in the card. Whenever PC Card cycles are in process to or from a card in ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers During a DMA data transfer process, an ISA-based system typically follows its issuance of a DMA acknowledge with a DMA read or write cycle. However, during a DMA write-verify operation, a system can issue a ...
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Table 14. Maximum DMA Acknowledge Delay Register Values (Sheet Register Value E0h 10h 90h 50h D0h 30h B0h 10.7.4 External Data (PD6722 only, Socket A, Index 2Fh) Register Name: External Data Index: 2Fh only Bit 7 Bit ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 10.7.5 External Data (PD6722 only, Socket A, Index 6Fh) Register Name: External Data Index: 6Fh only Bit 7 Bit 6 Bit 5 External Data External Data External Data RW:0 RW:0 RW:0 Bits ...
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Extension Control 2 Register Name: Extension Control 2 Index: 2Fh Bit 7 Bit 6 Bit 5 Active-high Reserved GPSTB RW:00 RW:0 Bit 5 — Active-high GPSTB 0 GPSTB ouputs are active-low. 1 GPSTB ouputs are active-high. Bit 4 — ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 11.0 Timing Registers The following information about the timing registers is important: • All timing registers take effect immediately and should only be changed when the FIFO is empty (see the FIFO Control register on ...
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Bits 7:6 — Setup Prescalar Select 00 N pres = pres = pres = 256 11 N pres = 8192 This field chooses one of four prescalar values N Multiplier Value (bits 5:0) to ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bits 5:0 — Command Multiplier Value This field indicates an integer value N 7:6) to control the length that a command is active. Bits 7:6 — Command Prescalar Select 00 N pres = 1 01 ...
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Bits 5:0 — Recovery Multiplier Value This field indicates an integer value N 7:6) to control the length of recovery time after a command is active. Bits 7:6 — Recovery Prescalar Select 00 N pres = pres ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 12.0 ATA Mode Operation The PD67XX PC Card interfaces can be dynamically configured to support a PC Card–compatible ATA disk interface (commonly known as ‘IDE’) instead of the standard PC Card interface. Disk drives that ...
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Table 17. ATA Pin Cross-Reference (Sheet Card Socket Pin Number ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 17. ATA Pin Cross-Reference (Sheet Card Socket Pin Number Not supported by the PD67XX. 90 Function PC Card ...
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Using GPSTB Pins for External Port Control (PD6722 only) The PD6722 provides pins that can be programmed to function as general-purpose strobes to external latches or buffers, allowing them to serve as read ports or write ports mapped into ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Bit 5 allows programming of the active level of GPSTB, with the default being active-low. Setting bit 5 to ‘1’ causes a GPSTB output to be low normally and high (active) upon external data access. ...
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Example Implementations of GPSTB-Controlled Read and Write Ports Figure 13. Example GPSTB Write Port (Extension Control 2 bits 4:3 are ‘10’) PD6722 IOW* IOW* SD[15:0] SD[15:0] (16-bit bus) PWRGOOD In this mode, Extension Control 2 register bit 4 is ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers In this mode, Extension Control 2 register bit 3 is set to ‘1’, enabling the respective GPSTB pin to function as a read strobe. Reads from the corresponding extended index 0Ah cause GPSTB to go ...
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VS1# and VS2# Voltage Detection The PD6722 provides support for VS1# and VS2# voltage sense for environments where special low-voltage keyed PC Card sockets are to be used. With a low-voltage keyed socket necessary to determine the ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 15. VS1# and VS2# Sensing on a PD6722 (Socket B Extension Control 2 bit 3 is ‘1’) PD6722 IOR* IOR* B_GPSTB SD[15:0] SD[15:0] (16-bit bus) 96 5-V Supply VS_RD* +5V † Tristate Buffer (such ...
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DMA Operation (PD6722 only) 15.1 DMA Capabilities of the PD6722 The PD6722 include support of a DMA-capable PC Card slave and the movement of DMA data to/ from the card with the ISA bus as a DMA master. Only ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 15.3 ISA Bus DMA Handshake Signal A DMA request from the card is passed to the ISA bus as long as the socket interface FIFO is empty. IRQ10 is used as the DMA request output ...
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Standard I/O Card Interface Signal Name -IOIS16 or may be selected as the active-low -IOIS16 DMA request input (BVD2/) -SPKR/-LED or may be selected as the active- -SPKR/-LED low DMA request input -INPACK or may be selected as the active-low ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers No other register bits require special settings to accommodate DMA support on a socket interface. 15.4.4 Turning On DMA System The DMA System bit (bit 6 of the Misc Control 2 register) should be programmed ...
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Electrical Specifications 16.1 Absolute Maximum Ratings Ambient temperature under bias Storage temperature Voltage on any pin (with respect to ground) Operating power dissipation Suspend power dissipation Power supply voltage Injection current (latch up) Caution: Stresses above those listed may ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 21. PC Card Bus Interface DC Specifications (Sheet Symbol Parameter V Input High Voltage CMOS IHC V Input Low Voltage CMOS ILC V Output High Voltage OH V Output High Voltage ...
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Table 22. ISA Bus Interface DC Specifications (Sheet Symbol Parameter Output Current Low, 2-mA-type driver Output Current Low 12-mA-type driver Output Current Low, 16-mA-type driver 1. When the CORE_VDD voltage is 3.3 V, input thresholds ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers 16.3 AC Timing Specifications This section includes system timing requirements for the PD67XX. Timings are provided in nanoseconds (ns), at TTL input levels, with the ambient temperature varying from and ...
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Table 26. ISA Bus Timing (Sheet Symbol t IOCS16* inactive delay from SA[15:0] 2a SA[16:0], SBHE* setup to any Command active t 3 LA[23:17] latching by ALE to any Command active t Any Command active to IOCHRDY ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 18. Bus Timing — ISA Bus ALE t 1a LA[23:17] VALID SA[16:0] SBHE MEMCS16* IOCS16* MEMR*, MEMW* IOR*, IOW* IOCHRDY WRITE DATA READ DATA AEN REFRESH* ZWS* 106 t 1b VALID t ...
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Reset Timing Table 27. Reset Timing Symbol t PWRGOOD generated reset pulse width 1 t Clock active before end of reset 2 t End of PWRGOOD generated reset to first Command 3 1. Clock input must be active for ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 20. Pulse Mode Interrupt Timing High-Z IRQ[XX] High-Z = high impedance NOTE: Each time indicated is 2 clock periods of the CLK input to the PD67XX, independent of setting of the Bypass Frequency Synthesizer ...
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Table 30. Input Clock Specification (Sheet Symbol Parameter Input clock period, T CLKP internal clock Input clock period, T CLKP external clock V CLK input high voltage IHmin V CLK input low voltage ILmax V CLK input ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers N and N are the specific selected prescaler and multiplier value from the timer set’s Setup, pres val Command, and Recovery Timing registers (see these registers). From this Card cycle’s Setup, Command, and ...
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PC Card Socket Timing Table 31. Memory Read/Write Timing (Word Access) Symbol -CE[2:1], -REG, Address, and Write Data setup to Command active 2 t Command pulse width 2 t Address hold and Write Data valid from ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 32. Word I/O Read/Write Timing Symbol t -REG or Address setup to Command active Command pulse width 2 t Address hold and Write Data valid from Command inactive 3 t -WAIT ...
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Figure 24. Word I/O Read/Write Timing -REG, A[25: -IOWR, -IORD -WAIT t ref ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 25. PC Card Read/Write Timing When System Is 8-Bit (SBHE Tied High) -REG, A[25:0] -OE, -WE -IOWR, -IORD, -CE1 D[7:0] Write Cycle D[7:0] Read Cycle D[15:8] Read or Write Cycle Table 34. Normal Byte ...
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Figure 26. Normal Byte Read/Write Timing -REG, A[25: IOWR, -IORD, -OE, -WE -CE1 ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 27. 16-Bit System to 8-Bit I/O Card: Odd Byte Timing -REG, A[25: ...
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Table 36. DMA Read Cycle Timing (PD6722 only) (Sheet Symbol t System TC (-VPP_VALID high) to -IOWR 7 t -IOWR to begin of card TC (-WE End of card TC (-WE) to -IOWR inactive 9 ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Table 37. DMA Write Cycle Timing (PD6722 only) Symbol t DRQ (IRQ10) and DACK* (IRQ9) active to DMA cycle begin 1 -CE[2:1], -REG, -IOWR, -WE, and Write Data setup to -IORD active ...
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Figure 29. DMA Write Cycle Timing IRQ10 (DRQ) IRQ9 (DACK -IOWR, - ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Figure 30. DMA Request Timing -INPACK, WP/-IOIS16 BVD2/-SPKR (-DREQ from card) IRQ10 (DRQ to system) 2 DMA Control register bits 7 and 6 define which of these three signals serve as the active-low ...
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Package Specifications 17.1 144-Pin LQFP Package 21.60 (0.850) 22.40 (0.882) 0.50 (0.0197) BSC Pin 144 0.10 (0.004) 0.20 (0.008) 1.40 (0.055) 1.65 (0.065) NOTES: 1. Dimensions are in millimeters (inches), and controlling dimension is millimeter. 2. Before beginning any ...
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... Drawing above does not reflect exact package pin count. 3. Before beginning any new design with this device, please contact Intel Corp. for the latest package information. 122 30.35 (1.195) 30.85 (1.215) 27.90 (1.098) 28.10 (1.106) 0.13 (0.005) 0.28 (0.011) SPD6722QCCE 208-Pin MQFP Pin 1 Indicator Pin 1 25.50 (1.004) REF 3.17 (0.125) 0.40 (0.016) 3.67 (0.144) 0.75 (0.030) 27.90 (1.098) 28 ...
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LQFP Package 29.60 (1.165) 30.40 (1.197) 0.50 (0.0197) BSC Pin 208 0.09 (0.004) 0.20 (0.008) NOTES: 1. Dimensions are in millimeters (inches), and controlling dimension is inches. 2. Drawing above does not reflect exact package pin count. 3. ...
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... The example order numbers for PD67XX devices are as follows: Portable Products Portable Products Product Line: Portable Products 124 DZPD6710VCB Product Line: Part Number SPD6722QCCE Product Line: Part Number Package Type: MQFP Metric quad flat pack DZPD6722VCCE Temperature Range Commercial Part Number ...
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Appendix A 19.1 Register Summary Tables 19.1.1 Operation Registers Register Name: Index Index: n/a Bit 7 Bit 6 Bit 5 Device Index Socket Index RW:0 RW:0 Register Name: Data Index: n/a Bit 7 Bit 6 Bit 5 19.2 Chip ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Register Name: Interface Status Index: 01h Bit 7 Bit 6 Bit 5 -VPP_VALID RDY Card Power V Valid Ready/Busy R Bit 7 is the inversion of the value of ...
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Register Name: Management Interrupt Configuration Index: 05h Bit 7 Bit 6 Bit 5 Management IRQ Select RW:0000 Register Name: Mapping Enable Index: 06h Bit 7 Bit 6 Bit 5 I/O Map 1 I/O Map 0 MEMCS16 Enable Enable Full Decode ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Register Name: System I/O Map 0–1 Start Address High Index: 09h, 0Dh Bit 7 Bit 6 Bit 5 Register Name: System I/O Map 0–1 End Address Low Index: 0Ah, 0Eh Bit 7 Bit 6 Bit ...
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Memory Window Mapping Registers Register Name: System Memory Map 0–4 Start Address Low Index: 10h, 18h, 20h, 28h, 30h Bit 7 Bit 6 Bit 5 Register Name: System Memory Map 0–4 Start Address High Index: 11h, 19h, 21h, 29h, ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Register Name: Card Memory Map 0–4 Offset Address High Index: 15h, 1Dh, 25h, 2Dh, 35h Bit 7 Bit 6 Bit 5 Write Protect REG Setting RW:0 RW:0 19.5 Extension Registers Register Name: Misc Control 1 ...
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Register Name: Chip Information Index: 1Fh Bit 7 Bit 6 Bit 5 PC Card Controller Dual/Single Identification Socket* R:11 R:n 1. The value for PD6710 is ’0’, and the value for PD6722 is ’1’. 2. This read-only value depends on ...
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers Register Name: Data Mask 1 (PD6722 only) Index: 2Fh Bit 7 Bit 6 Bit 5 Register Name: Extension Control 1 (PD6722 only) Index: 2Fh Bit 7 Bit 6 Bit 5 Pull-up DMA Enable Control RW:00 ...
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Register Name: Extension Control 2 (PD6722 only) Index: 2Fh and 6Fh Bit 7 Bit 6 Bit 5 Active-high Reserved GPSTB RW:00 RW:0 19.6 Timing Registers Register Name: Setup Timing 0–1 Index: 3Ah, 3Dh Bit 7 Bit 6 Bit 5 Setup ...
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...
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Index Symbols +5V 25 Numerics 5V Core bit 73 A A[25:0] 20 A21 bit 76 A22 bit 76 A23/VU bit 76 A24/M/S* bit 76 A25/CSEL bit 76 Active-high GPSTB bit 83 AEN 17 ALE 17 ATA Control register 75 ATA ...
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Device Index bit 41 DMA Enable bits 79 DMA mode description 97 overview 36 DMA Read Cycle timing 116 DMA Request timing 119 DMA System bit 74 DMA Write Cycle timing 118 Drive LED Enable bit 73 Dual/Single Socket* bit ...
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L LA[23:17] 16 -LED 23 LED Activity Enable bit 79 LED_OUT* 18 Low-Power Dynamic mode 32 Low-Power Dynamic Mode bit 73 M Management Interrupt Configuration register 54 Management IRQ Select bits 55 Mapping Enable register 55 MEMCS16 Full Decode bit ...
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Setup Multiplier Value bits 84 Setup Prescalar Select bit 85 Setup Timing 0–1 registers 84 SLOT_VCC. See SOCKET_VCC socket accessing specific registers 42 register per 39 Socket Index bit 41 socket power features 34 SOCKET_VCC 23 Speaker Enable bit 71 ...