HEF4027BT,653 NXP Semiconductors, HEF4027BT,653 Datasheet
HEF4027BT,653
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HEF4027BTD-T
HEF4027BTD-T
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HEF4027BT,653 Summary of contents
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HEF4027B Dual JK flip-flop Rev. 07 — 25 November 2009 1. General description The HEF4027B is a edge-triggered dual JK flip-flop which features independent set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP ...
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... NXP Semiconductors 5. Functional diagram Fig 1. Functional diagram Fig 2. Logic diagram of one flip-flop HEF4027B_7 Product data sheet 1SD 1CP 1CD 2SD 2CP 2CD 4 001aae593 Rev. 07 — 25 November 2009 HEF4027B Dual JK flip-flop 001aae595 © NXP B.V. 2009. All rights reserved ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin 1SD, 2SD 9, 7 1J, 2J 10, 6 1K, 2K 11, 5 1CD, 2CD 12, 4 1CP, 2CP 13, 3 1Q, 2Q 14, 2 1Q Functional description [1] Table 3. Function table Inputs nSD nCD ...
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... NXP Semiconductors [1] Table 3. Function table …continued Inputs nSD nCD nCP ↑ ↑ ↑ ↑ HIGH voltage level LOW voltage level don’t care.; ↑ = positive-going transition. [1] 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I HIGH-level output current OH I LOW-level output current OL I input leakage current I I supply current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions CP → HIGH to LOW PHL propagation delay see Figure 4 CD → Q; see Figure 4 SD → Q; see Figure 4 CP → LOW to HIGH PLH propagation delay see Figure 4 CD → ...
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... NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions f maximum CP input; max frequency HIGH; see Figure 5 [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C [ the same as t and t ...
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... NXP Semiconductors INPUT INPUT INPUT OUTPUT and V are typical output voltages levels that occur with the output load Measurement points are given in Fig 6. Waveforms showing pulse widths and recovery times Table 9. Measurement points Supply voltage Test data is given in Table 10. Definitions for test circuit: DUT = Device Under Test ...
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... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT b max. min. max. 1.73 mm 4.2 0.51 3.2 1.30 0.068 inches 0.17 0.02 0.13 0.051 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 14. Revision history Table 11. Revision history Document ID Release date HEF4027B_7 20091125 • Modifications: Section 9 “Recommended operating HEF4027B_6 20090624 HEF4027B_5 20081110 HEF4027B_4 20080703 HEF4027B_CNV_3 19950101 HEF4027B_CNV_2 19950101 HEF4027B_7 Product data sheet Data sheet status Change notice Product data sheet - conditions”, Δt/ΔV values updated. ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Revision history ...