74HC174D,652 NXP Semiconductors, 74HC174D,652 Datasheet - Page 16

IC HEX D F-F POS-EDGE 16-SOIC

74HC174D,652

Manufacturer Part Number
74HC174D,652
Description
IC HEX D F-F POS-EDGE 16-SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Type
D-Type Busr

Specifications of 74HC174D,652

Output Type
Inverted
Package / Case
16-SOIC (3.9mm Width)
Function
Master Reset
Number Of Elements
1
Number Of Bits Per Element
6
Frequency - Clock
107MHz
Delay Time - Propagation
16ns
Trigger Type
Positive Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
7
Logic Family
74HC
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
17 ns
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2628-5
933714570652
Philips Semiconductors
HCMOS family characteristics
FAMILY SPECIFICATIONS
AC CHARACTERISTICS
The “AC CHARACTERISTICS” table lists the guaranteed
limits when a device is tested under the conditions given in
the AC Test Circuits and Waveforms section.
TEST CIRCUITS
Good high-frequency wiring practices should be used in
test circuits. Capacitor leads should be as short as
possible to minimize ripples on the output waveform
transitions and undershoot. Generous ground metal
(preferably a ground-plane) should be used for the same
reasons. A V
decoupling capacitor should be provided
CC
at the test socket, also with short leads. Input signals
should have rise and fall times of 6 ns, a signal swing of
0 V to V
for 74HC and 0 V to 3 V for 74HCT; a 1.0 MHz
CC
square wave is recommended for most propagation delay
tests. The repetition rate must be increased for testing
f
. Two pulse generators are usually required for testing
max
such parameters as set-up time, hold time and removal
time. f
is also tested with 6 ns input rise and fall times,
max
with a 50% duty factor, but for typical f
as high as
max
60 MHz, there are no constraints on rise and fall times.
March 1988
16

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