st2024c Sitronix Technology Corporation, st2024c Datasheet - Page 34

• Manufacturer Part Number: st2024c
• Description: 24k 8-bit Single Chip Microcontroller
• Manufacturer: Sitronix Technology Corporation

14.2 Sampling Rate Control
The sample rate is controlled by PSG1L and PSG1H.
PSG1[11~7] controls sample rate/post scaling and PSG1[6]
must set ‘0’ and PSG1[5~0] must set ‘1’. The input clock
Ver 2.2
PSG[11~0]
DAC[7~0]
PSGC[6~4]
PSGCK
DMD[0]
DMD[1]
DACE
SYSCK
INH
OSCX
DAC SAMPLE RATE ALGORITHM DESCRIPTION
Note: PSG1[6] must set ‘0’ and PSG1[5~0] must set ‘1’ by DAC mode.
Sample Rate Generator
Sample-Rate = PSGCK / 128 / (20H-PSG1[11~7])
PSG[11~0]
CK_IN
Enable
IN0
IN1
TABLE 14-32: Sample Rate description table
PSG Selector
FIGURE 14-14: DAC Generator Diagram
FIGURE 14-15: Clock Source for DAC
Output
Select
Output
Fs
PSGCK
DAC[7~0]
Fs
Enable
34/54
DMD[0]
DMD[1]
PWM Generator
source is controlled by PCK[2~0]. The block diagram is
shown as the following:
Reload_DAC
POB
PO
B6 B5 B4
X
X
0
0
1
PSGC
0
0
1
1
0
0
1
0
1
0
SYSCK/2
SYSCK/4
SYSCK/8
SYSCK/16
SYSCK
PSGCK
BD
BDB
Reload_DAC
ST2024C
1/31/08