sm55161a-80hkcm Austin Semiconductor, Inc., sm55161a-80hkcm Datasheet - Page 40

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sm55161a-80hkcm

Manufacturer Part Number
sm55161a-80hkcm
Description
262144 X 16 Bit Vram Multiport Video Ram
Manufacturer
Austin Semiconductor, Inc.
Datasheet
FIGURE 33: ENHANCED-PAGE-MODE READ-MODIFY-WRITE-CYCLE TIMING
TABLE 11: ENHANCED-PAGE-MODE READ-MODIFY-WRITE-CYCLE STATE TABLE
NOTES:
A. Output can go from the high-impedance state to an invalid-data state prior to the specified access time.
B. A read or a write cycle can be intermixed with read-modify-write cycles as long as the read and write timing specifications are
not violated.
NOTES:
a don’t care during this cycle.
SMJ55161A
Rev. 1.6 03/05
Write operation (nonmasked)
Write operation with nonpersistent write-per-bit
Write operation with persistent write-per-bit
Load-write mask on either the first falling edge of CASx\
or the falling edge of WE\, whichever occurs later.
1. Load-write-mask-register cycle puts the device in the persistent write-per-bit mode. Column address at the falling edge of CASx\ is
Austin Semiconductor, Inc.
CYCLE
1
40
H
1
L
L
L
L
2
L
L
L
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
STATE
H
H
3
L
L
Write Mask Valid Data
Don't Care
Don't Care
Don't Care Write Mask
4
Production
SM55161A
VRAM
Valid Data
Valid Data
5

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