sm55161a-80hkcm Austin Semiconductor, Inc., sm55161a-80hkcm Datasheet - Page 8

• Manufacturer Part Number: sm55161a-80hkcm
• Description: 262144 X 16 Bit Vram Multiport Video Ram
• Manufacturer: Austin Semiconductor, Inc.

TABLE 3: DRAM FUNCTIONS
LEGEND:
Col Mask = H: Write to address/column enabled
Write Mask = H: Write to I/O enabled
X = Don’t Care
NOTES:
1. DQ0–DQ15 are latched on either the first falling edge of CASx\ or the falling edge of WE\, whichever occurs later.
2. Logic L is selected when either or both CASL\ and CASU\ are low.
3. The column address and block address are latched on the first falling edge of CASx\.
4. CBRS cycle should be performed immediately after the powerup initialization cycle.
5. A0–A3, A8: don’t care; A4–A7: stop-point code
6. CBR refresh (option reset) mode ends persistent write-per-bit mode and stop-point mode.
7. CBR refresh (no reset) mode does not end persistent write-per-bit mode or stop-point mode.
8. Load-write-mask-register cycle sets the persistent write-per-bit mode. The persistent write-per-bit mode is reset only by the CBR (option
reset) cycle.
9. MWT, MSWT, FWM function shown are for nonpersistent mask writes. These functions also support persistent mask write.
SMJ55161A
Rev. 1.6 03/05
Reserved (do not use)
CBR refresh (no reset) and stop-
point set
CBR refresh (option reset)
CBR refresh (no reset)
DRAM write
(nonpersistent write-per-bit)
DRAM block write
(nonpersistent write-per-bit)
DRAM write
(persistent write-per-bit)
DRAM block write
(persistent write-per-bit)
DRAM write (nonmasked)
DRAM block write (nonmasked)
Load write-mask register
Load color register
4
FUNCTION
Austin Semiconductor, Inc.
7
8
6
CASx\
H
H
H
H
H
H
H
H
L
L
L
L
2
TRG\
RAS\ FALL
H
H
H
H
H
H
H
H
X
X
X
L
WE\
H
H
H
H
H
H
L
L
L
L
L
L
8
DSF
H
H
H
H
L
L
L
L
L
L
L
L
CASx\
FALL
DSF
X
X
X
H
H
H
H
X
L
L
L
L
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
Address
Address
Address
Address
Address
Address
Address
Address
Refresh
Refresh
point
RAS\
Stop
Row
Row
Row
Row
Row
Row
X
X
ADDRESS
X
5
Address
Address
Address
Address
Address
Address
CASX\
Column
Column
Column
A3-A8
A3-A8
A3-A8
Block
Block
Block
X
X
X
X
X
X
3
Mask
Mask
RAS\
Write
Write
DQ0-DQ15
Production
X
X
X
X
X
X
X
X
X
X
SM55161A
Column
Column
Column
VRAM
CASL\
CASU\
Mask
Mask
Mask
Write
Mask
Color
Valid
Valid
Valid
Data
Data
Data
Data
WE\
X
X
X
X
1
CODE
CBRS
CBRN
RWM
RWM
BWM
BWM
MNE
CBR
LMR
LCR
RW
BW
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