isl9440a Intersil Corporation, isl9440a Datasheet - Page 14

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isl9440a

Manufacturer Part Number
isl9440a
Description
Triple, 180? Out-of-phase, Step-down Pwm And Single Linear Controller
Manufacturer
Intersil Corporation
Datasheet
The input voltage range can be effectively limited by the
available maximum duty cycle (D
ISL9441, D
where,
Vd1 = Sum of the parasitic voltage drops in the inductor
discharge path, including the lower FET, inductor and PC
board.
Vd2 = Sum of the voltage drops in the charging path,
including the upper FET, inductor and PC board resistances.
The maximum input voltage and minimum output voltage is
limited by the minimum on-time (t
where, t
Gate Control Logic
The gate control logic translates generated PWM signals into
gate drive signals providing amplification, level shifting and
shoot-through protection. The gate drivers have some circuitry
that helps optimize the IC performance over a wide range of
operational conditions. As MOSFET switching times can vary
dramatically from type to type and with input voltage, the gate
control logic provides adaptive dead time by monitoring real
gate waveforms of both the upper and the lower MOSFETs.
Shoot-through control logic provides a 20ns dead-time to
ensure that both the upper and lower MOSFETs will not turn on
simultaneously and cause a shoot-through condition.
Gate Drivers
The low-side gate driver is supplied from VCC_5V and
provides a peak sink current of 2A/2A/200mA and source
current of 800mA/800mA/400mA for Channels 1/2/3
respectively. The high-side gate driver is also capable of
delivering the same current as those in low-side gate driver.
Gate-drive voltages for the upper N-Channel MOSFET are
generated by the flying capacitor boot circuit. A boot capacitor
connected from the BOOT pin to the PHASE node provides
power to the high side MOSFET driver. To limit the peak
current in the IC, an external resistor may be placed between
the UGATE pin and the gate of the external MOSFET. This
small series resistor also damps any oscillations caused by
the resonant tank of the parasitic inductances in the traces of
the board and the FET’s input capacitance.
V
V
IN min
IN max
(
(
)
ON(min)
)
=
MAX
--------------------------------------------------- -
t
ON min
V
--------------------------------
OUT
(
= 30ns
= 86% for ISL9440A).
0.93
V
+
OUT
)
V
×
d1
300kHz
+
V
d2
14
V
MAX
d1
ON(min)
= 93% for ISL9440 and
).
ISL9440, ISL9440A, ISL9441
(EQ. 2)
(EQ. 3)
At start-up, the low-side MOSFET turns on and forces
PHASE to ground in order to charge the BOOT capacitor to
5V. After the low-side MOSFET turns off, the high-side
MOSFET is turned on by closing an internal switch between
BOOT and UGATE. This provides the necessary gate-to-
source voltage to turn on the upper MOSFET, an action that
boosts the 5V gate drive signal above VIN. The current
required to drive the upper MOSFET is drawn from the
internal 5V regulator.
Adaptive Dead Time
The ISL9440, ISL9440A and ISL9441 incorporate an
adaptive dead time algorithm on the synchronous buck
PWM controllers that optimizes operation with varying
MOSFET conditions. This algorithm provides an
approximately 20ns of dead time between switching the
upper and lower MOSFET’s. This dead time is adaptive and
allows operation with different MOSFET’s without having to
externally adjust the dead time using a resistor or capacitor.
During turn-off of the lower MOSFET, the LGATE voltage is
monitored until it reaches a 1V threshold, at which time the
UGATE is released to rise. Adaptive dead time circuitry
monitors the upper MOSFET gate voltage during UGATE
turn-off. Once the upper MOSFET gate-to-source voltage
has dropped below a threshold of 1V, the LGATE is allowed
to rise.
Internal Bootstrap Diode
The ISL9440, ISL9440A and ISL9441 have integrated
bootstrap diodes to help reduce total cost and reduce layout
complexity. Simply adding an external capacitor across the
BOOT and PHASE pins completes the bootstrap circuit. The
bootstrap capacitor must have a maximum voltage rating
above the maximum battery voltage plus 5V. The bootstrap
capacitor can be chosen from Equation 4.
C
ISL9440, ISL9440A, ISL9441
BOOT
----------------------- -
ΔV
Q
GATE
BOOT
UGATE
PHASE
VCC_5V
BOOT
FIGURE 16.
VIN
December 5, 2007
(EQ. 4)
FN6383.1

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