isl6307 Intersil Corporation, isl6307 Datasheet

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isl6307

Manufacturer Part Number
isl6307
Description
6-phase Pwm Controller With 8 Bit Vid Code Capable Of Precision Rds On Or Dcr Differential Current
Manufacturer
Intersil Corporation
Datasheet

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6-Phase PWM Controller with 8 Bit VID
Code Capable of Precision R
DCR Differential Current
The ISL6307 controls microprocessor core voltage regulation
by driving up to 6 synchronous-rectified buck channels in
parallel. Multiphase buck converter architecture uses
interleaved timing to multiply channel ripple frequency and
reduce input and output ripple currents. Lower ripple results in
fewer components, lower component cost, reduced power
dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates. The ISL6307 features a high
bandwidth control loop and ripple frequencies up to 6MHz to
provide optimal response to the transients.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6307
senses current by utilizing patented techniques to measure
the voltage across the on resistance, R
MOSFETs or DCR, of the output inductor during the lower
MOSFET conduction intervals. Current sensing provides the
needed signals for precision droop, channel-current
balancing, and overcurrent protection. A programmable
internal temperature compensation function is implemented
to effectively compensate for the temperature coefficient of
the current sense element.
A unity gain, differential amplifier is provided for remote
voltage sensing. Any potential difference between remote
and local grounds can be completely eliminated using the
remote-sense amplifier. Eliminating ground differences
improves regulation and protection accuracy. The threshold-
sensitive enable input is available to accurately coordinate
the start up of the ISL6307 with any other voltage rail.
Dynamic-VID™ technology allows seamless on-the-fly VID
changes. The offset pin allows accurate voltage offset
settings that are independent of VID setting.
Ordering Information
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
ISL6307CRZ
(See Note)
ISL6307IRZ
(See Note)
PART NUMBER
TEMP. (°C)
-40 to 85
0 to 70
®
1
48 Ld 7x7 QFN
(Pb-free)
48 Ld 7x7 QFN
(Pb-free)
PACKAGE
Data Sheet
DS(ON)
DS(ON)
, of the lower
L48.7x7
L48.7x7
PKG. DWG.
Dynamic VID™ is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006. All Rights Reserved
or
#
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Precision Multiphase Core Voltage Regulation
• Precision R
• Microprocessor Voltage Identification Input
• Threshold-Sensitive Enable Function for Power
• Thermal Monitoring
• Programmable Temperature Compensation
• Overcurrent Protection
• Overvoltage Protection with OVP Output Indication
• 2, 3, 4, 5 or 6 Phase Operation
• Adjustable Switching Frequency up to 1MHz per Phase
• QFN Package Option
• Pb-Free Plus Anneal Available (RoHS Compliant)
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Life, Load, Line and
- Adjustable Precision Reference-Voltage Offset
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Differential Current Sense
- Dynamic VID™ Technology
- 8-Bit VID Input with Selectable VR11 Code and
- 0.5V to 1.600V operation range
Sequencing and VTT Enable
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
- QFN Near Chip Scale Package Footprint; Improves
Temperature
Extended VR10 Code at 6.25mV Step
Flat No Leads - Product Outline
PCB Efficiency, Thinner in Profile
All other trademarks mentioned are the property of their respective owners.
March 9, 2006
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
DS(ON)
or DCR Current Sensing
ISL6307
FN9224.0

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isl6307 Summary of contents

Page 1

... Eliminating ground differences improves regulation and protection accuracy. The threshold- sensitive enable input is available to accurately coordinate the start up of the ISL6307 with any other voltage rail. Dynamic-VID™ technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting ...

Page 2

... Pinout 1 VID7 2 VID6 3 VID5 4 VID4 5 VID3 6 VID2 7 VID1 8 VID0 9 VRSEL 10 OFS 11 IOUT 12 DAC 2 ISL6307 ISL6307 (48-PIN QFN) TOP VIEW GND PWM3 35 ISEN3+ 34 ISEN3- 33 ISEN1- 32 ISEN1+ 31 PWM1 30 PWM4 29 ISEN4+ 28 ISEN4- 27 ISEN2- 26 ISEN2+ ...

Page 3

... ISL6307 Block Diagram VDIFF VR_RDY RGND x1 VSEN OVP SOFT-START +200mV FAULT LOGIC SS OFS OFFSET REF DAC VRSEL VID7 VID6 VID5 VID4 DYNAMIC VID3 VID VID2 D/A VID1 VID0 COMP FB 2V OC2 IOUT IDROOP GND 3 ISL6307 OVP OVP R S DRIVE Q CLOCK AND AND ...

Page 4

... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS OFS +12V NTC 4 ISL6307 DS(ON) +5V VCC EN ISL6605 PWM DRIVER GND +5V VCC +5V EN ISL6605 DRIVER PWM GND +5V VCC EN ISL6605 PWM DRIVER GND +5V VCC ...

Page 5

... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS FS SS +5V +5V R OFS +12V NTC 5 ISL6307 DS(ON) +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC +5V EN ISL6605 DRIVER PWM GND +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC EN ...

Page 6

... PWM1 IOUT ISEN1- ISEN1+ R IOUT PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR TCOMP OFS OFS R T +12V NTC 6 ISL6307 +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC +5V EN ISL6605 DRIVER PWM GND +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC EN ...

Page 7

... IOUT ISEN1- R IOUT ISEN1+ PWM3 ISEN3- ISEN3+ VR_FAN PWM5 ISEN5- VR_HOT ISEN5+ TM EN_PWR OFS FS TCOMP SS +5V +5V R OFS +12V NTC 7 ISL6307 +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC +5V EN ISL6605 DRIVER PWM GND +5V VCC EN ISL6605 DRIVER PWM GND +5V VCC ISL6605 ...

Page 8

... Operating Conditions Supply Voltage, VCC (5V bias mode, Note +5V ±5% Ambient Temperature (ISL6307CRZ 0°C to 70°C Ambient Temperature (ISL6307IRZ -40°C to 85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...

Page 9

... Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA. Unless Otherwise Specified (Continued) PARAMETER PIN-ADJUSTABLE OFFSET Voltage at OFS Pin for ISL6307CRZ Voltage at OFS Pin for ISL6307IRZ OSCILLATORS Accuracy of Switching Frequency Setting Adjustment Range of Switching Frequency (Note 4) Soft-start Ramp Rate (Note 5, 6) Adjustment Range of Soft-start Ramp Rate (Note 4) ...

Page 10

... Spec guaranteed by design. 5. During soft-start, VDAC rises from 0 to 1.1V first and then ramp to VID voltage after receiving valid VID input. 6. Soft-start ramp rate is determined by the adjustable soft-start oscillator frequency at the speed of 6.25mV per cycle. 10 ISL6307 TEST CONDITIONS VSEN Rising Before valid VID ...

Page 11

... ICs. When EN_PWR is driven above 0.875V, the ISL6307 is active depending on status of EN_VTT, the internal POR, and pending fault states. Driving EN_PWR below 0.745V will clear all fault states and prime the ISL6307 to soft-start when re-enabled. EN_VTT - This pin is another threshold-sensitive enable input for the controller. It’ ...

Page 12

... The voltage at IOUT pin will be proportional to the load current. If the voltage is higher than 2V, ISL6307 will go into OCP mode, this means shut down first and then hiccup. The additional OCP trip level can be adjusted by changing the resistor value. ...

Page 13

... RMS current for comparison. PWM Operation The timing of each converter leg is set by the number of active channels. The default channel setting for the ISL6307 is four. One switching cycle is defined as the time between PWM1 pulse termination signals. The pulse termination signal is an internally generated clock signal which triggers the falling edge of PWM1 ...

Page 14

... SAMPLE CURRENT, I SWITCHING PERIOD TIME FIGURE 3. SAMPLE AND HOLD TIMING Current Sensing The ISL6307 supports inductor DCR sensing, MOSFET R sensing, or resistive sensing techniques. The DS(ON) internal circuitry, shown in Figures 4, 5, and 6, represents one channel of an N-channel converter. This circuitry is repeated for each channel in the converter, but may not be active depending on the status of the PWM3 and PWM4 pins, as described in the PWM Operation section ...

Page 15

... In order to compensate the temperature effect on the sensed current signal, a Positive Temperature Coefficient (PTC) resistor can be selected for the sense resistor R temperature compensation function of ISL6307 should be utilized. The integrated temperature compensation function is described in the Temperature Compensation section. DS(ON) Channel-Current Balance The sensed current I together and divided by the number of active channels ...

Page 16

... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6307 to include the combined tolerances of each of these elements. The output of the error amplifier, V COMP sawtooth waveform to generate the PWM signals ...

Page 17

... ISL6307 TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) VID4 VID5 VID6 VOLTAGE 400mV 6.25mV ( 1 1.59375 1.5875 1.58125 1.575 ...

Page 18

... ISL6307 (Continued) TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) VID5 VID6 VOLTAGE VID4 6.25mV (V) 400mV 0 1 1.1125 1.10625 1 1.09375 OFF ...

Page 19

... ISL6307 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 1 0 1.45000 1.44375 1.43750 1.43125 1.42500 1.41875 ...

Page 20

... ISL6307 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 1 0 0.95000 0.94375 0.93750 0.93125 0.92500 0.91875 ...

Page 21

... DAC range of the processor without discontinuity or disruption is a necessary function of the core-voltage regulator. The ISL6307 checks the VID inputs six times every switching cycle. If the VID code is found to have been changed, the controller waits half of a complete cycle before executing a ...

Page 22

... After remaining at 1.1V for some time, ISL6307 reads the VID code at VID input pins. If the VID code is valid, ISL6307 will regulate the output to the final VID setting. If the VID code is OFF code, ISL6307 will shut down. Cycling Vcc, EN_PWR EXTERNAL CIRCUIT or EN_VTT is needed to restart ...

Page 23

... Intersil drivers respond to the high-impedance input by turning off both upper and lower MOSFETs. If the overvoltage condition reoccurs, the ISL6307 will again command the lower MOSFETs to turn on. The ISL6307 will continue to protect the load in this fashion as long as the overvoltage condition recurs. Once an overvoltage condition is detected, normal PWM operation ceases until the ISL6307 is reset ...

Page 24

... Current Sense Output The ISL6307 has 2 current sense output pins IDROOP and AVG, IOUT; They are identical. In typical application, IDROOP pin is connected to FB pin for the application where load line is required ...

Page 25

... TM voltage is lower than 33% of Vcc voltage, and is pulled to GND when TM voltage increases to above 39% of Vcc voltage. VR_HOT is set to high when TM voltage goes below 28% of Vcc voltage, and is pulled to GND when TM voltage goes back to above 33% of Vcc voltage. Figure 17 shows the operation of those signals. 25 ISL6307 VCC R 0.33V TM1 TM R ...

Page 26

... Integrated Temperature Compensation When TCOMP voltage is equal or greater than Vcc/15, ISL6307 will utilize the voltage at TM and TCOMP pins to 26 ISL6307 compensate the temperature impact on the sensed current. The block diagram of this function is shown in Figure 18. ...

Page 27

... NTC temperature and the temperature of the current sense component. ISL6307 multiplexes the TCOMP factor N with the TM digital signal to obtain the adjustment gain to compensate the temperature impact on the sensed channel current. The compensated channel current signal is used for droop and overcurrent protection functions ...

Page 28

... MOSFET R rr conduction loss. 28 ISL6307 When the upper MOSFET turns off, the lower MOSFET does not conduct any portion of the inductor current until the voltage at the phase node falls below ground. Once the lower MOSFET begins conducting, the current in the upper MOSFET falls to zero as the current in the lower MOSFET ramps up to assume the full inductor current ...

Page 29

... The optional capacitor C noise away from the PWM comparator (see Figure 21). Keep C (OPTIONAL COMP FB + IDROOP DROOP - VDIFF LOAD-LINE REGULATED ISL6307 CIRCUIT , has already been chosen The target 0 1 ------------------- > 2π LC 2π ----------------------------------- - ...

Page 30

... IDROOP VDIFF FIGURE 21. COMPENSATION CIRCUIT FOR ISL6307 BASED CONVERTER WITHOUT LOAD-LINE REGULATION The first step is to choose the desired bandwidth, f compensated system. Choose a frequency high enough to assure adequate transient performance but not higher than 1/3 of the switching frequency. The type-III compensator has an extra high-frequency pole, f ...

Page 31

... L because duty cycles are usually less than 50%. Nevertheless, both inequalities should be evaluated, and L should be selected based on the lower of the two results. In each equation the per-channel 31 ISL6307 inductance the total output capacitance, and N is the number of active channels. 2NCV O ≤ ...

Page 32

... The result from the high current slew rates produced by the upper MOSFETs turning on and off. Select low ESL ceramic capacitors and place one as close as possible to each upper MOSFET drain to 32 ISL6307 minimize board parasitic impedances and maximize suppression ...

Page 33

... The ISL6307 can be placed off to one side or centered relative to the individual phase switching components. Routing of sense lines and PWM signals will guide final placement. Critical small signal components to place close to the controller include the ISEN resistors, R feedback resistor, and compensation components ...

Page 34

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 34 ISL6307 L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VKKD-2 ISSUE C) ...

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