s908qc16g0cdte Freescale Semiconductor, Inc, s908qc16g0cdte Datasheet - Page 138

• Manufacturer Part Number: s908qc16g0cdte
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

Development Support
BCFE — Break Clear Flag Enable Bit
15.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes. If enabled, the
break module will remain enabled in wait and stop modes. However, since the internal address bus does
not increment in these modes, a break interrupt will never be triggered.
15.3 Monitor Module (MON)
The monitor module allows debugging and programming of the microcontroller unit (MCU) through a
single-wire interface with a host computer.
Features include:
15.3.1 Functional Description
Figure 15-9
The monitor module receives and executes commands from a host computer.
example circuit used to enter monitor mode and communicate with a host computer via a standard
RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the ROM difficult for
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unauthorized users.
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
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1 = Status bits clearable during break
0 = Status bits not clearable during break
Normal user-mode pin functionality on most pins
One pin dedicated to serial communication between MCU and host computer
Standard communication baud rates, using external 9.8304 MHz oscillator
Standard non-return-to-zero (NRZ) communication with host computer
Execution of code in random-access memory (RAM) or read-only memory (ROM)
ROM memory security feature
Reset into monitor mode if V
Use of internal oscillator once monitor mode entered and high voltage removed
shows a simplified diagram of monitor mode entry.
MC68HC08QY/QT Family Data Sheet, Rev. 2
TST
(1)
is applied to IRQ
Figure 15-10
Freescale Semiconductor
shows an