s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 280

• Manufacturer Part Number: s908gr32ag3vfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Electrical Specifications
280
Pullup/pulldown resistors (as input only)
Capacitance
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25°C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
7. This parameter is characterized and not tested on each device.
8. All functional non-supply pins are internally clamped to V
9. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
10. Power supply must maintain regulation within operating V
11. Pullups and pulldowns are disabled. Port B leakage is specified in
12. Maximum is highest voltage that POR is guaranteed.
13. Maximum is highest voltage that POR is possible.
14. If minimum V
Ports PTA7/KBD7–PTA0/KBD0, PTC6–PTC0/CAN
PTD7/T2CH1–PTD0/SS
Ports (as input or output)
(V
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
I
configured as inputs. Typical values at midpoint of voltage range, 25°C only.
rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.
conditions. If positive injection current (V
result in external power supply going out of regulation. Ensure external V
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
V
DD
TRIPF
DD
DD
. Measured with CGM and LVI enabled.
= 5.0 Vdc ± 10%, V
is reached.
DD
DD
DD
+ V
measured using external square wave clock source (f
with TBM enabled is measured using an external square wave clock source (f
is measured with OSC1 = V
HYS
DD
DD
. Measured with all modules enabled.
= V
(13)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
(12)
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
Characteristic
TRIPR
measured using external square wave clock source (f
(14)
)
SS
= 0 Vdc, T
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
(1)
SS
A
= T
. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all outputs. All ports
in
L
> V
A
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
(min) to T
DD
) is greater than I
TX
,
A
(max), unless otherwise noted
SS
DD
V
and V
Symbol
V
V
PORRST
range during instantaneous and operating maximum current
R
V
V
V
C
OSC
R
TRIPR
TRIPF
C
POR
POR
HYS
TST
Out
PU
In
DD
DD
= 32 MHz). All inputs 0.2 V from rail. No dc loads. Less
20.10 5.0-Volt ADC
.
, the injection current may flow out of V
DD
OSC
V
DD
load will shunt current greater than maximum
0.035
3.90
Min
4.0
20
—
—
—
0
0
= 32 MHz). All inputs 0.2 V from rail. No dc
+ 2.5
OSC
Characteristics.
Typ
4.25
4.35
100
700
= 8 MHz). All inputs 0.2 V from
45
—
—
—
—
—
(2)
Freescale Semiconductor
V
DD
Max
4.50
4.60
100
800
65
12
—
—
8
+ 4.0
DD
and could
V/ms
Unit
mV
mV
mV
kΩ
pF
V
V
V