s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 218

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s908ey8ad4cfjer

Manufacturer Part Number
s908ey8ad4cfjer
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface B (TIMB) Module
TSTOP — TIMB Stop Bit
TRST — TIMB Reset Bit
PS[2:0] — Prescaler Select Bits
218
This read/write bit stops the TIMB counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the TIMB counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIMB counter and the TIMB prescaler. Setting TRST has no effect
on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIMB
counter is reset and always reads as 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIMB counter as
Table 18-1
1 = TIMB counter stopped
0 = TIMB counter active
1 = Prescaler and TIMB counter cleared
0 = No effect
shows. Reset clears the PS[2:0] bits.
Do not set the TSTOP bit before entering wait mode if the TIMB is required
to exit wait mode. Also, when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until
TSTOP is cleared.
When using TSTOP to stop the timer counter, check for any timer flags
being set. If a timer flag is set, it must be cleared by clearing TSTOP, then
clearing the flag, then setting TSTOP again.
Setting the TSTOP and TRST bits simultaneously stops the TIMB counter
at a value of $0000.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
PS[2:0]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Table 18-1. Prescaler Selection
NOTE
NOTE
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 1
Internal bus clock ÷ 4
Internal bus clock ÷ 2
Internal bus clock ÷ 8
TIMB Clock Source
Unused
Freescale Semiconductor

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