s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 261

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

CPU clock — The CPU clock is derived from the CGMOUT output from the CGM. The CPU clock
CPU cycles — A CPU cycle is one period of the internal bus clock, normally derived by dividing a crystal
CPU registers — Memory locations that are wired directly into the CPU logic instead of being part of the
CSIC — customer-specified integrated circuit
cycle time — The period of the operating frequency: t
decimal number system — Base 10 numbering system that uses the digits zero through nine.
direct memory access module (DMA) — A M68HC08 Family module that can perform data transfers
DMA — See "direct memory access module (DMA)."
DMA service request — A signal from a peripheral to the DMA module that enables the DMA module to
duty cycle — A ratio of the amount of time the signal is on versus the time it is off. Duty cycle is usually
EEPROM — Electrically erasable, programmable, read-only memory. A nonvolatile type of memory that
EPROM — Erasable, programmable, read-only memory. A nonvolatile type of memory that can be erased
exception — An event such as an interrupt or a reset that stops the sequential execution of the
external interrupt module (IRQ) — A module in the M68HC08 Family with both dedicated external
fetch — To copy data from a memory location into the accumulator.
firmware — Instructions and data programmed into nonvolatile memory.
free-running counter — A device that counts from zero to a predetermined number, then rolls over to
Freescale Semiconductor
frequency is equal to the frequency of the oscillator output, CGMXCLK, divided by four.
oscillator source by two or more so the high and low times will be equal. The length of time required
to execute an instruction is measured in CPU clock cycles.
addressable memory map. The CPU always has direct access to the information in these registers.
The CPU registers in an M68HC08 are:
between any two CPU-addressable locations without CPU intervention. For transmitting or receiving
blocks of data to or from peripherals, DMA transfers are faster and more code-efficient than CPU
interrupts.
transfer data.
represented by a percentage.
can be electrically reprogrammed.
by exposure to an ultraviolet light source and then reprogrammed.
instructions in the main program.
interrupt pins and port pins that can be enabled as interrupt pins.
zero and begins counting again.
•A (8-bit accumulator)
•H:X (16-bit index register)
•SP (16-bit stack pointer)
•PC (16-bit program counter)
•CCR (condition code register containing the V, H, I, N, Z, and C bits)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
CYC
= 1/f
OP
.
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