lmx2505lq1321 National Semiconductor Corporation, lmx2505lq1321 Datasheet - Page 10

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lmx2505lq1321

Manufacturer Part Number
lmx2505lq1321
Description
Pllatinu Dual Frequency Synthesizer System With Integrated Vcos
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Functional Description
HIGH SPEED LOCK-UP MODE
Two frequency-locking modes are provided: a Normal mode
and a High Speed mode for faster lock times. The HS bit in
register R0 controls the locking mode.
HS Bit
0
1
TABLE 5. Lock-up Modes
High Speed mode
Normal mode
(Continued)
Mode
FIGURE 3. Lock Detect Flow Diagram
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MICROWIRE INTERFACE
The programmable register set is accessed via the
MICROWIRE serial interface. The interface is comprised of
three signal pins: CLK, DATA, and LE (Latch Enable). Serial
data is clocked into the 24-bit shift register on the rising edge
of the clock. The last bits decode the internal control register
address. When the latch enable (LE) transitions from LOW
to HIGH, data stored in the shift registers is loaded into the
corresponding control register. The data is loaded MSB first.
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