w83194br-pt Winbond Electronics Corp America, w83194br-pt Datasheet - Page 12

• Manufacturer Part Number: w83194br-pt
• Description: Stepless Via Pt Main Clock Generator
• Manufacturer: Winbond Electronics Corp America

7.6 Register 5: Watchdog Control (Default = 80h)
7.7 The Register 6, 7 is reserved for Buffer
7.8 Register 8: Watchdog Timer (Default = 08h)
7.9 Register 9: M/N Program (Default = ADh)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
WD_TIMEOUT
SAF_FREQ [4]
SAF_FREQ [3]
SAF_FREQ [2]
SAF_FREQ [1]
SAF_FREQ [0]
WD_TIME [7]
WD_TIME [6]
WD_TIME [5]
WD_TIME [4]
WD_TIME [3]
WD_TIME [2]
WD_TIME [1]
WD_TIME [0]
MULTISEL0
M_DIV [4]
M_DIV [3]
M_DIV [2]
M_DIV [1]
M_DIV [0]
N_DIV [8]
EN_WD
TEST2
TEST1
NAME
NAME
NAME
PWD
PWD
PWD
X
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
1
0
1
1
0
1
Pin 12 MULTISEL0 power on trapping pin data read back (Default = 1)
Enable Watchdog Timer if set to 1. Set to 0, disable watchdog timer.
Read this bit will return a counting state. If timer continues down count,
this bit will return 1. Otherwise, this bit will return 0.
Watchdog Timeout Status. If the watchdog is started and timer down
counts to zero, this bit will be set to 1. Clear this bit to logic 0, If set to
1, when the watchdog is restart in the next time. This bit is Read Only.
Watchdog safe frequency bits. These bits will be reloaded into FS
[4:0], if the watchdog is timeout and enable reload safe frequency bits.
Watchdog timeout time. The bit resolution is 250mS. The default time
is 8*250mS = 2.0 seconds. If the watchdog timer is start, this register
will be down count. Read this register will return a down count value.
Programmable N divisor value. Bit 7 ~0 are defined in the Register 10.
Test bit 2. Winbond test bit, do not change them.
Test bit 1. Winbond test bit, do not change them.
Programmable M divisor value.
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: April 13, 2005
W83194BR-PT
Revision 1.1