w83194br-pt Winbond Electronics Corp America, w83194br-pt Datasheet - Page 6

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w83194br-pt

Manufacturer Part Number
w83194br-pt
Description
Stepless Via Pt Main Clock Generator
Manufacturer
Winbond Electronics Corp America
Datasheet
5. PIN DESCRIPTION
5.1 Crystal I/O
5.2 CPU, AGP, and PCI, IOAPIC Clock Outputs
34, 35, 39,
14, 15, 17,
23, 26, 27
18, 19, 21
PIN
46, 45
41,42
4
5
PIN
BUFFER TYPE SYMBOL
40
10
11
12
PIN NAME
IN
IN
CPUCLKC [0:1]
CPUCLKT [0:1]
OUT
I/OD
XOUT
MULTISEL0*
OD
I/O
IN
tp120k
td120k
XIN
IOAPIC 0:1
&
#
CPUC_CS
*
CPUT_CS
PIN NAME
PCICLK1
PCI [2:7]
AGP0: 2
FS0
FS1
PCI8
PCI0
&
&
TYPE
OUT
IN
IN
IN
IN
TYPE
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
td120k
td120k
tp120k
Input
Latched input at power up, internal 120kΩ pull up.
Latched input at power up, internal 120kΩ pull down.
Output
Open Drain
Bi-directional Pin
Bi-directional Pin, Open Drain.
Active Low
Internal 120kΩ pull-up
Internal 120 kΩ pull-down
Crystal input with internal loading capacitors (18pF) and
feedback resistors.
Crystal output at 14.318MHz nominally with internal loading
capacitors (18pF).
Low skew (< 250ps) differential clock outputs for host
frequencies of CPU
Low skew (< 250ps) differential push pull clock outputs for
host frequencies of CHIPSET
3.3V AGP clock outputs.
3.3V PCI clock output.
Latched input for FS0 at initial power up for H/W selecting
the output frequency. This is internal 120K pull down.
3.3V PCI clock output.
Latched input for FS1 at initial power up for H/W selecting
the output frequency, This is internal 120K pull down.
3.3V PCI clock output.
Latched input for MULTSEL at initial power up, internal 120K
pull up
Low skew (< 250ps) PCI clock outputs.
2.5V PCI/2 clock outputs.
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: April 13, 2005
W83194BR-PT
Revision 1.1

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