adf4351 Analog Devices, Inc., adf4351 Datasheet - Page 23

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adf4351

Manufacturer Part Number
adf4351
Description
Wideband Synthesizer With Integrated Vco Preliminary Technical Data Adf4351
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
FAST LOCK—LOOP FILTER TOPOLOGY
To use fast-lock mode, the damping resistor in the loop filter
is reduced to ¼ of its value while in wide bandwidth mode. To
achieve the wider loop filter bandwidth, the charge pump
current increases by a factor of 16 and to maintain loop sta-
bility the damping resistor must be reduced a factor of ¼.
To enable fast lock, the SW pin is shorted to the GND pin by
settings Bits [DB16:DB15] in Register 3 to 0, 1. The following
two topologies are available:
SPUR MECHANISMS
This section describes the three different spur mechanisms that
arise with a fractional-N synthesizer and how to minimize them
in the ADF4351.
Fractional Spurs
The fractional interpolator in the ADF4351 is a third-order
Σ-Δ modulator (SDM) with a modulus (MOD) that is program-
mable to any integer value from 2 to 4095. In low spur mode
(dither enabled) the minimum allowable value of MOD is 50.
The SDM is clocked at the PFD reference rate (f
PLL output frequencies to be synthesized at a channel step
resolution of f
The damping resistor (R1) is divided into two values (R1
and R1A) that have a ratio of 1:3 (see Figure ).
An extra resistor (R1A) is connected directly from SW, as
shown in Figure . The extra resistor is calculated such that
the parallel combination of an extra resistor and the
damping resistor (R1) is reduced to ¼ of the original value
of R1 (see Figure ).
ADF4351
Figure 32. Fast-Lock Loop Filter Topology—Topology 2
Figure 31. Fast-Lock Loop Filter Topology—Topology 1
ADF4351
PFD
/MOD.
SW
CP
SW
CP
R1A
C1
C1
R1
C2
C2
R1
R1A
R2
R2
C3
C3
PFD
VCO
) that allows
VCO
Rev. PrC | Page 23 of 28
In low noise mode (dither disabled) the quantization noise from
the Σ-Δ modulator appears as fractional spurs. The interval
between spurs is f
sequence in the digital Σ-Δ modulator. For the third-order
modulator used in the ADF4351, the repeat length depends on
the value of MOD, as listed in Table 6.
Table 6. Fractional Spurs with Dither Disabled
Condition (Dither Disabled)
If MOD is divisible by 2, but not 3
If MOD is divisible by 3, but not 2
If MOD is divisible by 6
Otherwise
In low spur mode (dither enabled), the repeat length is extend-
ed to 2
the quantization error spectrum look like broadband noise.
This may degrade the in-band phase noise at the PLL output
by as much as 10 dB. For lowest noise, dither disabled is a better
choice, particularly when the final loop bandwidth is low
enough to attenuate even the lowest frequency fractional spur.
Integer Boundary Spurs
Another mechanism for fractional spur creation is the inter-
actions between the RF VCO frequency and the reference
frequency. When these frequencies are not integer related (the
point of a fractional-N synthesizer) spur sidebands appear on
the VCO output spectrum at an offset frequency that corres-
ponds to the beat note or difference frequency between an
integer multiple of the reference and the VCO frequency. These
spurs are attenuated by the loop filter and are more noticeable
on channels close to integer multiples of the reference where the
difference frequency can be inside the loop bandwidth, there-
fore, the name integer boundary spurs.
Reference Spurs
Reference spurs are generally not a problem in fractional-N
synthesizers because the reference offset is far outside the loop
bandwidth. However, any reference feed-through mechanism
that bypasses the loop may cause a problem. Feed through of
low levels of on-chip reference switching noise, through the
RF
high as –90 dBc. PCB layout needs to ensure adequate isolation
between VCO traces and the input reference to avoid a possible
feed through path on the board.
IN
pin back to the VCO, can result in reference spur levels as
21
cycles, regardless of the value of MOD, which makes
PFD
/L, where L is the repeat length of the code
Repeat
Length
2 × MOD
3 × MOD
6 × MOD
MOD
Spur Interval
Channel step/2
Channel step/3
Channel step/6
Channel step
ADF4351

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