uda1352ts-n3 NXP Semiconductors, uda1352ts-n3 Datasheet - Page 15

• Manufacturer Part Number: uda1352ts-n3
• Description: 48 Khz Iec 60958 Audio Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9.6
For proper and reliable operation, the UDA1352TS must be initialized in the L3-bus mode. This is required to have the
PLL start-up after powering up of the device under all conditions. The initialization string is given in Table 8.
Table 8 L3-bus initialization string and set defaults after power-up
10 I
10.1
The bus is for 2-way, 2-line communication between
different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be
connected to the V
connected to the output stages of a microcontroller. For a
400 kHz IC the recommendation for this type of bus from
Philips Semiconductors must be followed (e.g. up to loads
of 200 pF on the bus a pull-up resistor can be used,
between 200 to 400 pF a current source or switched
resistor must be used). Data transfer can only be initiated
when the bus is not busy.
2002 Nov 22
handbook, full pagewidth
1
2
3
4
5
6
7
8
BYTE
48 kHz IEC 60958 audio DAC
2
C-BUS DESCRIPTION
Initialization string
Characteristics of the I
address
data transfer
data transfer
data transfer
address
data transfer
data transfer
data transfer
L3-BUS
MODE
DD
via a pull-up resistor when
init string
set
defaults
SDA
SCL
2
C-bus
ACTION
device address
register address
data byte 1
data byte 2
device address
register address
data byte 1
data byte 2
Fig.7 Bit transfer on the I
data valid
data line
stable;
BIT 0
0
0
0
0
0
0
0
0
15
FIRST IN TIME
allowed
change
of data
10.2
One data bit is transferred during each clock pulse (see
Fig.7). The data on the SDA line must remain stable during
the HIGH period of the clock pulse as changes in the data
line at this time will be interpreted as control signals. The
maximum clock frequency is 400 kHz.
To be able to run on this high frequency all the inputs and
outputs connected to this bus must be designed for this
high-speed I
I
2
C-bus and how to use it” , (order code 9398 393 40011).
BIT 1
1
1
0
0
1
1
0
0
Bit transfer
2
C-bus.
BIT 2
DA0
DA0
2
0
0
0
1
0
0
C-bus according to specification “The
BIT 3
DA1
DA1
MBC621
0
0
0
1
0
0
BIT 4
1
0
0
0
1
1
0
0
Preliminary specification
BIT 5
UDA1352TS
0
0
0
0
0
1
0
0
LAST IN TIME
BIT 6
0
0
0
0
0
1
0
0
BIT 7
0
0
0
1
0
1
0
0