uda1352ts-n3 NXP Semiconductors, uda1352ts-n3 Datasheet - Page 31
uda1352ts-n3
Manufacturer Part Number
uda1352ts-n3
Description
48 Khz Iec 60958 Audio Dac
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1352TS-N3.pdf
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Philips Semiconductors
12.6
Table 33 Register address 14H
Table 34 Description of register bits
2002 Nov 22
Symbol
Default
Symbol
Default
13 to 10
48 kHz IEC 60958 audio DAC
8 to 7
6 to 0
BIT
BIT
BIT
15
14
9
Polarity (write)
DA_POL_INV DAC polarity control. A 1-bit value to control the signal polarity of the DAC output
DA_POL_
SYMBOL
INV
15
0
7
0
signal. If this bit is logic 0, then the DAC output is not inverted. If this bit is logic 1, then
the DAC output is inverted. Default value 0.
When writing new settings via the L3-bus or I
remain at logic 1 (default value) to guarantee correct operation.
reserved
When writing new settings via the L3-bus or I
remain at logic 1 (default value) to guarantee correct operation.
When writing new settings via the L3-bus or I
remain at logic 0 (default value) to guarantee correct operation.
reserved
14
1
6
13
5
12
31
4
DESCRIPTION
11
3
2
2
2
C-bus interface, this bit should always
C-bus interface, this bit should always
C-bus interface, these bits should always
10
2
Preliminary specification
UDA1352TS
9
1
1
8
0
0
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