xa2c32a Xilinx Corp., xa2c32a Datasheet - Page 2

• Manufacturer Part Number: xa2c32a
• Description: Coolrunner-ii Automotive Cpld Product Family
• Manufacturer: Xilinx Corp.

CoolRunner-II Automotive CPLD Product Family
Table 2
age offering with corresponding I/O count. All packages are
surface mount, and the ultra tiny packages permit maximum
functional capacity in the smallest possible area. The
Table 2: CoolRunner-II Automotive CPLD Family Packages and I/O Count
Table 3
the CoolRunner-II Automotive CPLD family. The family has
uniform basic features with advanced features included in
densities where they are most useful. For example, it is very
unlikely that four I/O banks are needed on 32 and 64 mac-
Table 3: CoolRunner-II Automotive CPLD Family Features
Architecture Description
CoolRunner-II Automotive CPLD is a highly uniform family
of fast, low power CPLDs. The underlying architecture is a
traditional CPLD architecture combining macrocells into
Function Blocks (FBs) interconnected with a global routing
matrix, the Xilinx Advanced Interconnect Matrix (AIM). The
Function Blocks use a Programmable Logic Array (PLA)
configuration which allows all product terms to be routed
and shared among any of the macrocells of the FB. Design
software can efficiently synthesize and optimize logic that is
subsequently fit to the FBs and connected with the ability to
utilize a very high percentage of device resources. Design
changes are easily and automatically managed by the soft-
2
1.
VQG44
VQG100
CPG132
TQG144
IEEE 1532
I/O banks
Clock division
DualEDGE Registers
DataGATE
LVTTL
LVCMOS33, 25, 18, and
15
Configurable ground
Quadruple data security
Open drain outputs
Hot plugging
Schmitt Inputs
(1)
LVCMOS15 requires the use of Schmitt-trigger inputs.
details the distribution of advanced features across
shows the CoolRunner-II Automotive CPLD pack-
XA2C32A
33
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XA2C32A
2
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XA2C64A
33
64
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www.xilinx.com
XA2C64A
2
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CMOS technology used in CoolRunner-II Automotive
CPLDs generates minimal heat, allowing the use of tiny
packages during high-speed operation.
rocell parts, but very likely for the 384 macrocell part. The
I/O banks are groupings of I/O pins using any one of a sub-
set of compatible voltage standards that share the same
V
Automotive CPLD I/O standards.)
ware, which exploits the 100% routability of the Program-
mable Logic Array within each FB. This extremely robust
building block delivers the industry’s highest pinout reten-
tion, under very broad design conditions. The architecture
will be explained by expanding the detail as we discuss the
underlying Function Blocks, logic and interconnect.
The design software automatically manages these device
resources so that users can express their designs using
completely generic constructs without knowledge of these
architectural details. More advanced users can take advan-
tage of these details to more thoroughly understand the
software’s choices and direct its results.
CCIO
XA2C128
level. (See
100
80
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XA2C128
2
Table 4
XA2C256
for a summary of CoolRunner-II
XA2C256
118
80
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DS315 (v1.1) October 31, 2006
2
Product Specification
XA2C384
XA2C384
118
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4
R