adsp-21992 Analog Devices, Inc., adsp-21992 Datasheet - Page 17

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adsp-21992

Manufacturer Part Number
adsp-21992
Description
Mixed Signal Dsp Controller With Can
Manufacturer
Analog Devices, Inc.
Datasheet

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PIN FUNCTION DESCRIPTIONS
ADSP-21992 pin definitions are listed in
ADSP-21992 inputs are asynchronous and can be asserted asyn-
chronously to CLKIN (or to TCK for TRST).
Unused inputs should be tied or pulled to V
except for ADDR21–0, DATA15–0, PF7–0, and inputs that have
internal pull-up or pull-down resistors (TRST, BMODE0,
BMODE1, BMODE2, BYPASS, TCK, TMS, TDI, PWMPOL,
PWMSR, and RESET)—these pins can be left floating. These
pins have a logic level hold circuit that prevents input from
Table 4. Pin Descriptions
Name
A19–A0
D15–D0
RD
WR
ACK
BR
BG
BGH
MS0
MS1
MS2
MS3
IOMS
BMS
CLKIN
XTAL
CLKOUT
BYPASS
RESET
POR
BMODE2
BMODE1
BMODE0
TCK
TMS
TDI
TDO
TRST
EMU
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
ASHAN
Type
D, OT
D, BT
D, OT
D, OT
D, I
D, I, PU
D, O
D, O
D, OT
D, OT
D, OT
D, OT
D, OT
D, OT
D, I, CKG
D, I, PU
D, O
D, I
D, I, PU
D, I, PU
D, OT
D, I, PU
D, OT, PU
A, I
D, O, CKG
D, O
D, I, PU
D, I, PU
D, I, PD
D, I, PU
A, I
A, I
A, I
A, I
A, I
A, I
A, I
A, I
Table
DDEXT
4. All
or GND,
Rev. A | Page 17 of 60 | August 2007
Function
External Port Address Bus
External Port Data Bus
External Port Read Strobe
External Port Write Strobe
External Port Access Ready Acknowledge
External Port Bus Request
External Port Bus Grant
External Port Bus Grant Hang
External Port Memory Select Strobe 0
External Port Memory Select Strobe 1
External Port Memory Select Strobe 2
External Port Memory Select Strobe 3
External Port IO Space Select Strobe
External Port Boot Memory Select Strobe
Clock Input/Oscillator Input/Crystal Connection 0
Oscillator Output/Crystal Connection 1
Clock Output (HCLK)
PLL Bypass Mode Select
Processor Reset Input
Power on Reset Output
Boot Mode Select Input 2
Boot Mode Select Input 1
Boot Mode Select Input 0
JTAG Test Clock
JTAG Test Mode Select
JTAG Test Data Input
JTAG Test Data Output
JTAG Test Reset Input
Emulation Status
ADC Input 0
ADC Input 1
ADC Input 2
ADC Input 3
ADC Input 4
ADC Input 5
ADC Input 6
ADC Input 7
Inverting SHA_A Input
floating internally. PWMTRIP has an internal pull-down, but
should not be left floating to avoid unnecessary PWM
shutdowns.
The following symbols appear in the Type column of
G = ground, I = input, O = output, P = power supply,
B = bidirectional, T = three-state, D = digital, A = analog,
CKG = clock generation pin, PU = internal pull-up,
PD = internal pull-down, and OD = open drain.
ADSP-21992
Table
4:

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