adsp-21992 Analog Devices, Inc., adsp-21992 Datasheet - Page 47
adsp-21992
Manufacturer Part Number
adsp-21992
Description
Mixed Signal Dsp Controller With Can
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-21992.pdf
(60 pages)
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Serial Peripheral Interface Port—Slave Timing
Table 25
Table 25. Serial Peripheral Interface (SPI) Port—Slave Timing
Parameter
Timing Requirements
t
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
HSPID
DSOE
DSDHI
DDSPID
HDSPID
and
Figure 17
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SPICLK Edge to SPISS Not Asserted
Sequential Transfer Delay
Data Input Valid to SCLK Edge (Data Input Setup)
SCLK Sampling Edge to Data Input Invalid (Data In Hold)
SCLK Edge to Data Out Valid (Data Out Delay)
SCLK Edge to Data Out Invalid (Data Out Hold)
SPISS Assertion to First SPICLK Edge
SPISS Assertion to Data Out Active
SPISS Deassertion to Data High Impedance
describe SPI port slave operations.
Rev. A | Page 47 of 60 | August 2007
Min
2t
2t
4t
2t
2t
2t
1.6
2.4
0
0
0
0
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
+ 4
Max
8
10
10
10
ADSP-21992
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns