ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 157

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
Reset
CPU Access
Note: X = Undefined; R/W = Read/Write.
Bit
Position
[7:0]
DMAX_DAR_L,
DMAX_DAR_H,
or
DMAX_DAR_U
DMA Destination Address Registers
This group of registers holds the 24-bit address of the current destination memory
location. Depending upon settings within the DMA Control registers’ DMA_CTL
fields, the 24-bit address values can automatically be incremented, decremented,
or unchanged following transfer of each byte of data. See
DMA Byte Count Registers
The two pairs of DMA Byte Count registers, indicated in
number of bytes to be transferred by the DMA channels. The 16-bit value,
{DMAx_BC_H, DMAx_BC_L}, is decremented after each transfer. The DMA trans-
fer is complete when the value decrements to
transferred.
DMA1_DAR_L = FAh, DMA1_DAR_H = FBh, DMA1_DAR_U = FCh
DMA0_DAR_L = F1h, DMA0_DAR_H = F2h, DMA0_DAR_U = F3h
Table 78. DMA Destination Address Registers
Value Description
00h–
FFh
R/W
X
7
The 2 sets of DMA Destination address registers contain
the memory location addresses for the destination of the
data transfer. The 24-bit addresses are returned by
{DMAx_DAR_U, DMAx_DAR_H, DMAx_DAR_L} where x
is either 0 or 1.
R/W
X
6
PRELIMINARY
R/W
X
5
R/W
X
4
0000h
R/W
X
3
eZ80190 Product Specification
. One to 65535 bytes can be
R/W
Direct Memory Access Controller
X
2
Table
Table
R/W
79, contain the
X
1
78.
R/W
X
0
143