mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 275

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mc68hc908mr8

Manufacturer Part Number
mc68hc908mr8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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13.9.5 SCI Status Register 2
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
SCI status register 2 (SCS2) contains flags to signal these conditions:
BKF — Break Flag Bit
RPF —Reception-in-Progress Flag Bit
Reset:
dress:
Read:
Write:
Ad-
This clearable, read-only bit is set when the SCI detects a break
character on the PTB0/RxD pin. In SCS1, the FE and SCRF bits are
also set. In 9-bit character transmissions, the R8 bit in SCC3 is
cleared. BKF does not generate a CPU interrupt request. Clear BKF
by reading SCS2 with BKF set and then reading the SCDR. Once
cleared, BKF can become set again only after logic 1s again appear
on the PTB0/RxD pin followed by another break character. Reset
clears the BKF bit.
This read-only bit is set when the receiver detects a logic 0 during the
RT1 time period of the start bit search. RPF does not generate an
interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch, or when the receiver
detects an idle character. Polling RPF before disabling the SCI
module or entering stop mode can show whether a reception is in
progress.
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
Break character detected
Incoming data
$003C
Serial Communications Interface (SCI)
Bit 7
R
R
0
0
Figure 13-12. SCI Status Register 2 (SCS2)
= Reserved
R
6
0
0
R
5
0
0
R
4
0
0
Serial Communications Interface (SCI)
R
3
0
0
R
2
0
0
BKF
R
1
0
Technical Data
I/O Registers
Bit 0
RPF
R
0
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