mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 337

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mc68hc908mr8

Manufacturer Part Number
mc68hc908mr8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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20.6.4 SIM Break Flag Control Register
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
The SIM break flag control register (SBFCR) contains a bit that enables
software to clear status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
Reset:
dress:
Read:
Write:
Ad-
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
HIBYTE EQU
LOBYTE EQU
DOLO
RETURN PULH
1 = Status bits clearable during break
0 = Status bits not clearable during break
Figure 20-8. SIM Break Flag Control Register (SBFCR)
$FE03
BCFE
Bit 7
R
0
BRCLR BW,BSR, RETURN ; See if wait mode or stop
TST
BNE
DEC
DEC
RTI
= Reserved
5
6
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
R
6
Break (BRK)
Figure 20-7. Example Code
R
5
R
4
; If not BW, do RTI
; mode was exited by break.
; If RETURNLO is not 0,
; then just decrement low byte.
; Else deal with high byte also.
; Point to WAIT/STOP opcode.
; Restore H register.
R
3
R
2
Break Module Registers
R
1
Technical Data
Break (BRK)
Bit 0
R
337

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