mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 143

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

PAFLG — Pulse Accumulator Flag Register
13-timer
RESET:
Bit 7
0
0
6
0
0
CLK1, CLK0 — Clock Select Register
PAOVI — Pulse Accumulator Overflow Interrupt Enable
PAI — Pulse Accumulator Input Interrupt Enable
PAOVF — Pulse Accumulator Overflow Flag
If the timer is not active (TEN = 0 in TSCR), there is no 64 clock since
the E 64 clock is generated by the timer prescaler.
If the pulse accumulator is disabled (PAEN = 0), the prescaler clock
from the timer is always used as an input clock to the timer counter.
The change from one selected clock to the other happens
immediately after these bits are written.
Read or write anytime.
When TFFCA bit in the TSCR register is set, any access to the
PACNT register will clear all the flags in the PAFLG register.
Set when the 16-bit pulse accumulator overflows from $FFFF to
$0000. This bit is cleared automatically by a write to the PAFLG
register with bit 1 set.
Freescale Semiconductor, Inc.
CLK1
For More Information On This Product,
0 = Interrupt inhibited
1 = Interrupt requested if PAOVF is set
0 = Interrupt inhibited
1 = Interrupt requested if PAIF is set
0
0
1
1
5
0
0
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CLK0
Standard Timer Module
0
1
0
1
4
0
0
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Use PACLK/256 as timer counter clock frequency
Use PACLK/65536 as timer counter clock frequency
Table 28 Clock Selection
3
0
0
2
0
0
Selected Clock
PAOVF
1
0
MC68HC912BD32 Rev 1.0
Standard Timer Module
Bit 0
PAIF
0
Timer Registers
$00A1