mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 32

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
4.2
If more than one interrupt request is pending, the CPU fetches the vector of the
higher priority interrupt first. A higher priority interrupt does not actually interrupt a
lower priority interrupt service routine unless the lower priority interrupt service
routine clears the I bit.
INTERRUPT PROCESSING
The CPU does the following actions to begin servicing an interrupt:
The return from interrupt (RTI) instruction causes the CPU to recover its register
contents from the stack as shown in Figure 4-1. The sequence of events caused
by an interrupt are shown in the flow chart in Figure 4-2.
•
•
•
Stores the CPU registers on the stack in the order shown in Figure 4-1.
Sets the I bit in the condition code register to prevent further interrupts.
Loads the program counter with the contents of the appropriate interrupt
vector locations as shown in Table 4-1.
$00BE
$00FD
$00BF
$00C0
$00C1
$00C2
$00FE
$00FF
$0020
$0021
n+1
n+2
n+3
n+4
n
PROGRAM COUNTER (HIGH BYTE)
Freescale Semiconductor, Inc.
PROGRAM COUNTER (LOW BYTE)
Figure 4-1. Interrupt Stacking Order
CONDITION CODE REGISTER
For More Information On This Product,
TOP OF STACK (RAM)
(BOTTOM OF STACK)
(BOTTOM OF RAM)
INDEX REGISTER
ACCUMULATOR
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February 24, 1999
INTERRUPTS
NOTE
STACKING
ORDER
5
4
3
2
1
UNSTACKING
ORDER
1
2
3
4
5
REV